Add DCB::enable_trace() and DCB::disable_trace()

1 files changed, 17 insertions, 0 deletions

diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs
index 02ec901..d0202db 100644
--- a/src/peripheral/dcb.rs
+++ b/src/peripheral/dcb.rs
@@ -2,6 +2,8 @@
 
 use volatile_register::{RW, WO};
 
+use peripheral::DCB;
+
 /// Register block
 #[repr(C)]
 pub struct RegisterBlock {
@@ -14,3 +16,18 @@ pub struct RegisterBlock {
     /// Debug Exception and Monitor Control
     pub demcr: RW<u32>,
 }
+
+impl DCB {
+    /// Enables TRACE. This is for example required by the 
+    /// `peripheral::DWT` cycle counter to work properly.
+    /// As by STM documentation, this flag is not reset on
+    /// soft-reset, only on power reset.
+    pub fn enable_trace(&mut self) {
+        unsafe { self.demcr.modify(|w| w | 0x01000000); }
+    }
+    
+    /// Disables TRACE. See `DCB::enable_trace()` for more details
+    pub fn disable_trace(&mut self) {
+        unsafe { self.demcr.modify(|w| w & !0x01000000); }
+    }
+}