diff options
| author |  Jorge Aparicio <japaricious@gmail.com>
| 2017-03-07 22:56:06 -0500 |
|---|---|---|
| committer | Jorge Aparicio <japaricious@gmail.com>
| 2017-03-07 22:58:33 -0500 |
| commit | c3a35c1b6cea81aa71e8832bca79ccafa492be02 (patch) | |
| tree | e868906d20c906d238be96cd5c07b07342f7a111 /src/peripheral/dcb.rs | |
| parent | 9d3f3f323f3b7543d0b49e773aea2c68e535ec83 (diff) | |
| download | cortex-m-c3a35c1b6cea81aa71e8832bca79ccafa492be02.tar.gz cortex-m-c3a35c1b6cea81aa71e8832bca79ccafa492be02.tar.zst cortex-m-c3a35c1b6cea81aa71e8832bca79ccafa492be02.zip | |
revamp for memory safety
Diffstat (limited to 'src/peripheral/dcb.rs')
| -rw-r--r-- | src/peripheral/dcb.rs | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs deleted file mode 100644 index 93a056b..0000000 --- a/src/peripheral/dcb.rs +++ /dev/null @@ -1,16 +0,0 @@ -//! Debug Control Block - -use volatile_register::{RW, WO}; - -/// Registers -#[repr(C)] -pub struct Registers { - /// Debug Halting Control and Status - pub dhcsr: RW<u32>, - /// Debug Core Register Selector - pub dcrsr: WO<u32>, - /// Debug Core Register Data - pub dcrdr: RW<u32>, - /// Debug Exception and Monitor Control - pub demcr: RW<u32>, -} |