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author | 2016-09-27 18:35:29 -0500 | |
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committer | 2016-09-27 18:35:29 -0500 | |
commit | ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0 (patch) | |
tree | ac8332c9d63b45082f81ce419045c9b16db1b270 /src/peripheral/dcb.rs | |
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initial commit
Diffstat (limited to 'src/peripheral/dcb.rs')
-rw-r--r-- | src/peripheral/dcb.rs | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs new file mode 100644 index 0000000..93a056b --- /dev/null +++ b/src/peripheral/dcb.rs @@ -0,0 +1,16 @@ +//! Debug Control Block + +use volatile_register::{RW, WO}; + +/// Registers +#[repr(C)] +pub struct Registers { + /// Debug Halting Control and Status + pub dhcsr: RW<u32>, + /// Debug Core Register Selector + pub dcrsr: WO<u32>, + /// Debug Core Register Data + pub dcrdr: RW<u32>, + /// Debug Exception and Monitor Control + pub demcr: RW<u32>, +} |