aboutsummaryrefslogtreecommitdiff
path: root/src/peripheral/mpu.rs
diff options
context:
space:
mode:
authorGravatar Adam Greig <adam@adamgreig.com> 2023-10-16 01:33:34 +0100
committerGravatar Adam Greig <adam@adamgreig.com> 2023-10-16 01:57:48 +0100
commit0a701d68b51da9468a9a5e518667d4c037102e85 (patch)
treeea97c5f9726b46e5f9aef2721208645fa37d9750 /src/peripheral/mpu.rs
parentc52330f333afe5358b5b6cccb4837eeb92af2759 (diff)
downloadcortex-m-0a701d68b51da9468a9a5e518667d4c037102e85.tar.gz
cortex-m-0a701d68b51da9468a9a5e518667d4c037102e85.tar.zst
cortex-m-0a701d68b51da9468a9a5e518667d4c037102e85.zip
Move cortex-m crate into cortex-m directory
Diffstat (limited to 'src/peripheral/mpu.rs')
-rw-r--r--src/peripheral/mpu.rs65
1 files changed, 0 insertions, 65 deletions
diff --git a/src/peripheral/mpu.rs b/src/peripheral/mpu.rs
deleted file mode 100644
index 3a5f5b4..0000000
--- a/src/peripheral/mpu.rs
+++ /dev/null
@@ -1,65 +0,0 @@
-//! Memory Protection Unit
-
-use volatile_register::{RO, RW};
-
-/// Register block for ARMv7-M
-#[cfg(not(armv8m))]
-#[repr(C)]
-pub struct RegisterBlock {
- /// Type
- pub _type: RO<u32>,
- /// Control
- pub ctrl: RW<u32>,
- /// Region Number
- pub rnr: RW<u32>,
- /// Region Base Address
- pub rbar: RW<u32>,
- /// Region Attribute and Size
- pub rasr: RW<u32>,
- /// Alias 1 of RBAR
- pub rbar_a1: RW<u32>,
- /// Alias 1 of RASR
- pub rasr_a1: RW<u32>,
- /// Alias 2 of RBAR
- pub rbar_a2: RW<u32>,
- /// Alias 2 of RASR
- pub rasr_a2: RW<u32>,
- /// Alias 3 of RBAR
- pub rbar_a3: RW<u32>,
- /// Alias 3 of RASR
- pub rasr_a3: RW<u32>,
-}
-
-/// Register block for ARMv8-M
-#[cfg(armv8m)]
-#[repr(C)]
-pub struct RegisterBlock {
- /// Type
- pub _type: RO<u32>,
- /// Control
- pub ctrl: RW<u32>,
- /// Region Number
- pub rnr: RW<u32>,
- /// Region Base Address
- pub rbar: RW<u32>,
- /// Region Limit Address
- pub rlar: RW<u32>,
- /// Alias 1 of RBAR
- pub rbar_a1: RW<u32>,
- /// Alias 1 of RLAR
- pub rlar_a1: RW<u32>,
- /// Alias 2 of RBAR
- pub rbar_a2: RW<u32>,
- /// Alias 2 of RLAR
- pub rlar_a2: RW<u32>,
- /// Alias 3 of RBAR
- pub rbar_a3: RW<u32>,
- /// Alias 3 of RLAR
- pub rlar_a3: RW<u32>,
-
- // Reserved word at offset 0xBC
- _reserved: u32,
-
- /// Memory Attribute Indirection register 0 and 1
- pub mair: [RW<u32>; 2],
-}