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author | 2017-12-09 10:03:39 +0000 | |
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committer | 2017-12-09 10:03:39 +0000 | |
commit | ce5bee6e37b4127040224523a1af85c275401a18 (patch) | |
tree | bc6033773fa2c8959d6de6d8b673902141f17c84 /src/peripheral/mpu.rs | |
parent | 7e05e189c5195303f8693d442b71754f956fc81f (diff) | |
parent | 0b45ea4bd486565da5d78793dcb4718afb4f4387 (diff) | |
download | cortex-m-ce5bee6e37b4127040224523a1af85c275401a18.tar.gz cortex-m-ce5bee6e37b4127040224523a1af85c275401a18.tar.zst cortex-m-ce5bee6e37b4127040224523a1af85c275401a18.zip |
Auto merge of #65 - japaric:singletons, r=japaric
turn peripherals into scoped singletons
See this RFC for details: japaric/svd2rust#157
Diffstat (limited to 'src/peripheral/mpu.rs')
-rw-r--r-- | src/peripheral/mpu.rs | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/peripheral/mpu.rs b/src/peripheral/mpu.rs new file mode 100644 index 0000000..09d06f0 --- /dev/null +++ b/src/peripheral/mpu.rs @@ -0,0 +1,30 @@ +//! Memory Protection Unit + +use volatile_register::{RO, RW}; + +/// Register block +#[repr(C)] +pub struct RegisterBlock { + /// Type + pub _type: RO<u32>, + /// Control + pub ctrl: RW<u32>, + /// Region Number + pub rnr: RW<u32>, + /// Region Base Address + pub rbar: RW<u32>, + /// Region Attribute and Size + pub rasr: RW<u32>, + /// Alias 1 of RBAR + pub rbar_a1: RW<u32>, + /// Alias 1 of RSAR + pub rsar_a1: RW<u32>, + /// Alias 2 of RBAR + pub rbar_a2: RW<u32>, + /// Alias 2 of RSAR + pub rsar_a2: RW<u32>, + /// Alias 3 of RBAR + pub rbar_a3: RW<u32>, + /// Alias 3 of RSAR + pub rsar_a3: RW<u32>, +} |