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author | 2016-09-27 18:35:29 -0500 | |
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committer | 2016-09-27 18:35:29 -0500 | |
commit | ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0 (patch) | |
tree | ac8332c9d63b45082f81ce419045c9b16db1b270 /src/peripheral/mpu.rs | |
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initial commit
Diffstat (limited to 'src/peripheral/mpu.rs')
-rw-r--r-- | src/peripheral/mpu.rs | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/peripheral/mpu.rs b/src/peripheral/mpu.rs new file mode 100644 index 0000000..e024e62 --- /dev/null +++ b/src/peripheral/mpu.rs @@ -0,0 +1,30 @@ +//! Memory Protection Unit + +use volatile_register::{RO, RW}; + +/// Registers +#[repr(C)] +pub struct Registers { + /// Type + pub _type: RO<u32>, + /// Control + pub ctrl: RW<u32>, + /// Region Number + pub rnr: RW<u32>, + /// Region Base Address + pub rbar: RW<u32>, + /// Region Attribute and Size + pub rasr: RW<u32>, + /// Alias 1 of RBAR + pub rbar_a1: RW<u32>, + /// Alias 1 of RSAR + pub rsar_a1: RW<u32>, + /// Alias 2 of RBAR + pub rbar_a2: RW<u32>, + /// Alias 2 of RSAR + pub rsar_a2: RW<u32>, + /// Alias 3 of RBAR + pub rbar_a3: RW<u32>, + /// Alias 3 of RSAR + pub rsar_a3: RW<u32>, +} |