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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2020-06-10 13:33:47 +0000
committerGravatar GitHub <noreply@github.com> 2020-06-10 13:33:47 +0000
commit1c9d36ebe682d79f35ef2b1f34e611cfbf8ee81e (patch)
tree5de12aeaba5f014509851bf810e9a92c78638c65 /src/peripheral/scb.rs
parentb725dfb43e3597a260cff5761da049782cab4d27 (diff)
parent1c198a1f53b0fdef53c723843331a059da6cb6a3 (diff)
parenta06010ed54190ccb575e5917b1c3290df2ed29ff (diff)
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Merge #225 #226
225: Initial ARMv8-M MPU support. r=adamgreig a=cbiffle The v8-M MPU is entirely different from, and incompatible with, the earlier PMSA MPU. And so this commit does two things: 1. Makes the old RegisterBlock depend on armv6m (for M0+) and armv7m. 2. Defines a new RegisterBlock containing the right layout for v8m. The hack for documenting fields by opting in x86-64 means the v8m version won't appear in the docs. 226: Expose the orphaned ICTR/ACTLR registers. r=adamgreig a=cbiffle In ARMv7-M these were floating alone in system control space, without a unifying name. As a result, they weren't exposed in earlier versions of this crate. In ARMv8-M they have been given a name, the Implementation Control Block, and more registers have been added. I've used that name for all architecture revisions. Co-authored-by: Cliff L. Biffle <cliff@oxide.computer>