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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2020-03-14 15:27:28 +0000
committerGravatar GitHub <noreply@github.com> 2020-03-14 15:27:28 +0000
commit1cb6baf8bd46b602c01d51e7a3c5c6e77af9c8f2 (patch)
treeebe6d29b0f9f9ad2ffde71db0e8e71c27ddc9bf2 /src/peripheral/scb.rs
parent72befe4c163e59393789d3043afe1e67a7fc0044 (diff)
parent2433d85190dad9e4cbaa4086eba796ab59bf0adb (diff)
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Merge #189
189: Initial Rust CMSE support r=thejpster a=hug-dev Armv8-M and Armv8.1-M architecture profiles have an optional Security Extension which provides a set of Security features. This patch adds initial support of the Cortex-M Security Extensions but providing support for the TT intrinsics and helper functions on top of it in the newly added `cmse` module of this crate. The code is a Rust idiomatic implementation of the C requirements described in this document: https://developer.arm.com/docs/ecm0359818/latest Executed `assemble.sh` to generate the new static libraries containing the `TT*` instructions. Tested `check_blobs.sh` locally and it passed. Tested on QEMU using the `mps2-an505` machine. Co-authored-by: Hugues de Valon <hugues.devalon@arm.com>
Diffstat (limited to 'src/peripheral/scb.rs')
-rw-r--r--src/peripheral/scb.rs2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index dc82dc7..dfcc729 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -713,6 +713,7 @@ impl SCB {
///
/// Cleaning the cache causes whatever data is present in the cache to be immediately written
/// to main memory, overwriting whatever was in main memory.
+ #[inline]
pub fn clean_dcache_by_ref<T>(&mut self, obj: &T) {
self.clean_dcache_by_address(obj as *const T as usize, core::mem::size_of::<T>());
}
@@ -729,6 +730,7 @@ impl SCB {
///
/// Cleaning the cache causes whatever data is present in the cache to be immediately written
/// to main memory, overwriting whatever was in main memory.
+ #[inline]
pub fn clean_dcache_by_slice<T>(&mut self, slice: &[T]) {
self.clean_dcache_by_address(slice.as_ptr() as usize,
slice.len() * core::mem::size_of::<T>());