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| author |  homunkulus <homunkulus@gmx.com>
| 2017-12-20 12:10:25 +0000 |
|---|---|---|
| committer | homunkulus <homunkulus@gmx.com>
| 2017-12-20 12:10:25 +0000 |
| commit | 4689992eace79c49fecac4a51323f0c0dcc1e812 (patch) | |
| tree | e76e67594bbc3c8a5f74f0acfa4d2f8d40e412f1 /src/peripheral/scb.rs | |
| parent | 74cb12e105346d11d57ef653669748d28d96c05e (diff) | |
| parent | d952f0ca5705c83e1c1e9ab0fdd1f7d5e2acd1b0 (diff) | |
| download | cortex-m-4689992eace79c49fecac4a51323f0c0dcc1e812.tar.gz cortex-m-4689992eace79c49fecac4a51323f0c0dcc1e812.tar.zst cortex-m-4689992eace79c49fecac4a51323f0c0dcc1e812.zip | |
Auto merge of #62 - hannobraun:update-nvic, r=japaric
Update NVIC
This pull request updated the NVIC definition and brings it in line with the ARMv7-M technical reference manual. Since ARMv6-M's NVIC is a subset of ARMv7-M's one, this should work on both platforms.
I tried adding some `#[cfg(armv7m]`, to make only the registers available on ARMv6-M visible on that platform, but aborted that plan, as it seemed to add a lot of complexity. What do you think about this, @japaric?
I also checked the [ARMv8-M Technical Reference Manual](https://static.docs.arm.com/ddi0553/a/DDI0553A_e_armv8m_arm.pdf). The NVIC is largely identical to ARMv7-M's one and only adds an additional block of registers between IABR and IPR, so it will be straight-forward to add support once that becomes relevant.
Diffstat (limited to 'src/peripheral/scb.rs')
0 files changed, 0 insertions, 0 deletions