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| author |  Jorge Aparicio <japaricious@gmail.com>
| 2016-09-27 18:35:29 -0500 |
|---|---|---|
| committer | Jorge Aparicio <japaricious@gmail.com>
| 2016-09-27 18:35:29 -0500 |
| commit | ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0 (patch) | |
| tree | ac8332c9d63b45082f81ce419045c9b16db1b270 /src/peripheral/syst.rs | |
| download | cortex-m-ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0.tar.gz cortex-m-ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0.tar.zst cortex-m-ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0.zip | |
initial commit
Diffstat (limited to 'src/peripheral/syst.rs')
| -rw-r--r-- | src/peripheral/syst.rs | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/peripheral/syst.rs b/src/peripheral/syst.rs new file mode 100644 index 0000000..8ee70a1 --- /dev/null +++ b/src/peripheral/syst.rs @@ -0,0 +1,16 @@ +//! SysTick: System Timer + +use volatile_register::{RO, RW}; + +/// Registers +#[repr(C)] +pub struct Registers { + /// Control and Status + pub csr: RW<u32>, + /// Reload Value + pub rvr: RW<u32>, + /// Current Value + pub cvr: RW<u32>, + /// Calibration Value + pub calib: RO<u32>, +} |