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authorGravatar Jorge Aparicio <japaricious@gmail.com> 2017-03-07 22:56:06 -0500
committerGravatar Jorge Aparicio <japaricious@gmail.com> 2017-03-07 22:58:33 -0500
commitc3a35c1b6cea81aa71e8832bca79ccafa492be02 (patch)
treee868906d20c906d238be96cd5c07b07342f7a111 /src/peripheral/tpiu.rs
parent9d3f3f323f3b7543d0b49e773aea2c68e535ec83 (diff)
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revamp for memory safety
Diffstat (limited to 'src/peripheral/tpiu.rs')
-rw-r--r--src/peripheral/tpiu.rs26
1 files changed, 0 insertions, 26 deletions
diff --git a/src/peripheral/tpiu.rs b/src/peripheral/tpiu.rs
deleted file mode 100644
index 5047351..0000000
--- a/src/peripheral/tpiu.rs
+++ /dev/null
@@ -1,26 +0,0 @@
-//! Trace Port Interface Unit
-
-use volatile_register::{RO, RW, WO};
-
-/// Registers
-#[repr(C)]
-pub struct Registers {
- /// Supported Parallel Port Sizes
- pub sspsr: RO<u32>,
- /// Current Parallel Port Size
- pub cspsr: RW<u32>,
- reserved0: [u32; 2],
- /// Asynchronous Clock Prescaler
- pub acpr: RW<u32>,
- reserved1: [u32; 55],
- /// Selected Pin Control
- pub sppr: RW<u32>,
- reserved2: [u32; 943],
- /// Lock Access
- pub lar: WO<u32>,
- /// Lock Status
- pub lsr: RO<u32>,
- reserved3: [u32; 4],
- /// TPIU Type
- pub _type: RO<u32>,
-}