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author | 2016-09-27 18:35:29 -0500 | |
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committer | 2016-09-27 18:35:29 -0500 | |
commit | ddc7f255b57d0e6aeb9f3b1b7466b2e5c0c5fff0 (patch) | |
tree | ac8332c9d63b45082f81ce419045c9b16db1b270 /src/peripheral/tpiu.rs | |
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initial commit
Diffstat (limited to 'src/peripheral/tpiu.rs')
-rw-r--r-- | src/peripheral/tpiu.rs | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/peripheral/tpiu.rs b/src/peripheral/tpiu.rs new file mode 100644 index 0000000..5047351 --- /dev/null +++ b/src/peripheral/tpiu.rs @@ -0,0 +1,26 @@ +//! Trace Port Interface Unit + +use volatile_register::{RO, RW, WO}; + +/// Registers +#[repr(C)] +pub struct Registers { + /// Supported Parallel Port Sizes + pub sspsr: RO<u32>, + /// Current Parallel Port Size + pub cspsr: RW<u32>, + reserved0: [u32; 2], + /// Asynchronous Clock Prescaler + pub acpr: RW<u32>, + reserved1: [u32; 55], + /// Selected Pin Control + pub sppr: RW<u32>, + reserved2: [u32; 943], + /// Lock Access + pub lar: WO<u32>, + /// Lock Status + pub lsr: RO<u32>, + reserved3: [u32; 4], + /// TPIU Type + pub _type: RO<u32>, +} |