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author | 2020-04-28 22:11:31 +0200 | |
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committer | 2020-04-28 22:11:31 +0200 | |
commit | ba7496c5bffeb31cc206f24de3c35b6cf7ae962c (patch) | |
tree | 04dd19ddf5afd42fbe27516f170fa1d755a69017 /src/register | |
parent | e41b27331c70865b89b5584b13c0b469de30daff (diff) | |
download | cortex-m-ba7496c5bffeb31cc206f24de3c35b6cf7ae962c.tar.gz cortex-m-ba7496c5bffeb31cc206f24de3c35b6cf7ae962c.tar.zst cortex-m-ba7496c5bffeb31cc206f24de3c35b6cf7ae962c.zip |
Use llmv_asm! macro for inline assembly
\ fixes #204
the `asm!` macro will soon be deprecated.
This changes all of the `asm!` calls to `llvm_asm!`
To my knowledge doing a direct replacement should be fine.
Diffstat (limited to 'src/register')
-rw-r--r-- | src/register/apsr.rs | 2 | ||||
-rw-r--r-- | src/register/basepri.rs | 6 | ||||
-rw-r--r-- | src/register/basepri_max.rs | 4 | ||||
-rw-r--r-- | src/register/control.rs | 4 | ||||
-rw-r--r-- | src/register/faultmask.rs | 2 | ||||
-rw-r--r-- | src/register/lr.rs | 4 | ||||
-rw-r--r-- | src/register/msp.rs | 4 | ||||
-rw-r--r-- | src/register/msplim.rs | 4 | ||||
-rw-r--r-- | src/register/pc.rs | 4 | ||||
-rw-r--r-- | src/register/primask.rs | 2 | ||||
-rw-r--r-- | src/register/psp.rs | 4 | ||||
-rw-r--r-- | src/register/psplim.rs | 4 |
12 files changed, 22 insertions, 22 deletions
diff --git a/src/register/apsr.rs b/src/register/apsr.rs index 97a9f01..3db8aeb 100644 --- a/src/register/apsr.rs +++ b/src/register/apsr.rs @@ -55,7 +55,7 @@ pub fn read() -> Apsr { () => { let r: u32; unsafe { - asm!("mrs $0, APSR" : "=r"(r) ::: "volatile"); + llvm_asm!("mrs $0, APSR" : "=r"(r) ::: "volatile"); } Apsr { bits: r } } diff --git a/src/register/basepri.rs b/src/register/basepri.rs index a09e34b..6caf938 100644 --- a/src/register/basepri.rs +++ b/src/register/basepri.rs @@ -8,7 +8,7 @@ pub fn read() -> u8 { () => { let r: u32; unsafe { - asm!("mrs $0, BASEPRI" : "=r"(r) ::: "volatile"); + llvm_asm!("mrs $0, BASEPRI" : "=r"(r) ::: "volatile"); } r as u8 } @@ -37,10 +37,10 @@ pub unsafe fn write(_basepri: u8) { #[cfg(all(cortex_m, feature = "inline-asm"))] () => match () { #[cfg(not(feature = "cm7-r0p1"))] - () => asm!("msr BASEPRI, $0" :: "r"(_basepri) : "memory" : "volatile"), + () => llvm_asm!("msr BASEPRI, $0" :: "r"(_basepri) : "memory" : "volatile"), #[cfg(feature = "cm7-r0p1")] () => crate::interrupt::free( - |_| asm!("msr BASEPRI, $0" :: "r"(_basepri) : "memory" : "volatile"), + |_| llvm_asm!("msr BASEPRI, $0" :: "r"(_basepri) : "memory" : "volatile"), ), }, diff --git a/src/register/basepri_max.rs b/src/register/basepri_max.rs index 694fd75..0e66f69 100644 --- a/src/register/basepri_max.rs +++ b/src/register/basepri_max.rs @@ -14,10 +14,10 @@ pub fn write(_basepri: u8) { () => unsafe { match () { #[cfg(not(feature = "cm7-r0p1"))] - () => asm!("msr BASEPRI_MAX, $0" :: "r"(_basepri) : "memory" : "volatile"), + () => llvm_asm!("msr BASEPRI_MAX, $0" :: "r"(_basepri) : "memory" : "volatile"), #[cfg(feature = "cm7-r0p1")] () => crate::interrupt::free( - |_| asm!("msr BASEPRI_MAX, $0" :: "r"(_basepri) : "memory" : "volatile"), + |_| llvm_asm!("msr BASEPRI_MAX, $0" :: "r"(_basepri) : "memory" : "volatile"), ), } }, diff --git a/src/register/control.rs b/src/register/control.rs index 07b26c3..211b532 100644 --- a/src/register/control.rs +++ b/src/register/control.rs @@ -163,7 +163,7 @@ pub fn read() -> Control { #[cfg(feature = "inline-asm")] () => { let r: u32; - unsafe { asm!("mrs $0, CONTROL" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0, CONTROL" : "=r"(r) ::: "volatile") } r } @@ -194,7 +194,7 @@ pub unsafe fn write(_control: Control) { #[cfg(feature = "inline-asm")] () => { let control = _control.bits(); - asm!("msr CONTROL, $0" :: "r"(control) : "memory" : "volatile"); + llvm_asm!("msr CONTROL, $0" :: "r"(control) : "memory" : "volatile"); } #[cfg(not(feature = "inline-asm"))] diff --git a/src/register/faultmask.rs b/src/register/faultmask.rs index 811385f..06f60fe 100644 --- a/src/register/faultmask.rs +++ b/src/register/faultmask.rs @@ -34,7 +34,7 @@ pub fn read() -> Faultmask { #[cfg(feature = "inline-asm")] () => { let r: u32; - unsafe { asm!("mrs $0, FAULTMASK" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0, FAULTMASK" : "=r"(r) ::: "volatile") } r } diff --git a/src/register/lr.rs b/src/register/lr.rs index a17f7ac..6919e10 100644 --- a/src/register/lr.rs +++ b/src/register/lr.rs @@ -9,7 +9,7 @@ pub fn read() -> u32 { #[cfg(cortex_m)] () => { let r: u32; - unsafe { asm!("mov $0,R14" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mov $0,R14" : "=r"(r) ::: "volatile") } r } @@ -25,7 +25,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(cortex_m)] - () => asm!("mov R14,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("mov R14,$0" :: "r"(_bits) :: "volatile"), #[cfg(not(cortex_m))] () => unimplemented!(), diff --git a/src/register/msp.rs b/src/register/msp.rs index 082a7fc..b5460ed 100644 --- a/src/register/msp.rs +++ b/src/register/msp.rs @@ -7,7 +7,7 @@ pub fn read() -> u32 { #[cfg(all(cortex_m, feature = "inline-asm"))] () => { let r; - unsafe { asm!("mrs $0,MSP" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0,MSP" : "=r"(r) ::: "volatile") } r } @@ -30,7 +30,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(all(cortex_m, feature = "inline-asm"))] - () => asm!("msr MSP,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("msr MSP,$0" :: "r"(_bits) :: "volatile"), #[cfg(all(cortex_m, not(feature = "inline-asm")))] () => { diff --git a/src/register/msplim.rs b/src/register/msplim.rs index df3642a..68915c4 100644 --- a/src/register/msplim.rs +++ b/src/register/msplim.rs @@ -7,7 +7,7 @@ pub fn read() -> u32 { #[cfg(all(cortex_m, feature = "inline-asm"))] () => { let r; - unsafe { asm!("mrs $0,MSPLIM" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0,MSPLIM" : "=r"(r) ::: "volatile") } r } @@ -30,7 +30,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(all(cortex_m, feature = "inline-asm"))] - () => asm!("msr MSPLIM,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("msr MSPLIM,$0" :: "r"(_bits) :: "volatile"), #[cfg(all(cortex_m, not(feature = "inline-asm")))] () => { diff --git a/src/register/pc.rs b/src/register/pc.rs index 37176e8..f4486c4 100644 --- a/src/register/pc.rs +++ b/src/register/pc.rs @@ -9,7 +9,7 @@ pub fn read() -> u32 { #[cfg(cortex_m)] () => { let r; - unsafe { asm!("mov $0,R15" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mov $0,R15" : "=r"(r) ::: "volatile") } r } @@ -25,7 +25,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(cortex_m)] - () => asm!("mov R15,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("mov R15,$0" :: "r"(_bits) :: "volatile"), #[cfg(not(cortex_m))] () => unimplemented!(), diff --git a/src/register/primask.rs b/src/register/primask.rs index 018c45b..4b6df3c 100644 --- a/src/register/primask.rs +++ b/src/register/primask.rs @@ -34,7 +34,7 @@ pub fn read() -> Primask { #[cfg(feature = "inline-asm")] () => { let r: u32; - unsafe { asm!("mrs $0, PRIMASK" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0, PRIMASK" : "=r"(r) ::: "volatile") } r } diff --git a/src/register/psp.rs b/src/register/psp.rs index b6618b0..c020e4f 100644 --- a/src/register/psp.rs +++ b/src/register/psp.rs @@ -7,7 +7,7 @@ pub fn read() -> u32 { #[cfg(all(cortex_m, feature = "inline-asm"))] () => { let r; - unsafe { asm!("mrs $0,PSP" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0,PSP" : "=r"(r) ::: "volatile") } r } @@ -30,7 +30,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(all(cortex_m, feature = "inline-asm"))] - () => asm!("msr PSP,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("msr PSP,$0" :: "r"(_bits) :: "volatile"), #[cfg(all(cortex_m, not(feature = "inline-asm")))] () => { diff --git a/src/register/psplim.rs b/src/register/psplim.rs index 6c27008..8cb8f1c 100644 --- a/src/register/psplim.rs +++ b/src/register/psplim.rs @@ -7,7 +7,7 @@ pub fn read() -> u32 { #[cfg(all(cortex_m, feature = "inline-asm"))] () => { let r; - unsafe { asm!("mrs $0,PSPLIM" : "=r"(r) ::: "volatile") } + unsafe { llvm_asm!("mrs $0,PSPLIM" : "=r"(r) ::: "volatile") } r } @@ -30,7 +30,7 @@ pub fn read() -> u32 { pub unsafe fn write(_bits: u32) { match () { #[cfg(all(cortex_m, feature = "inline-asm"))] - () => asm!("msr PSPLIM,$0" :: "r"(_bits) :: "volatile"), + () => llvm_asm!("msr PSPLIM,$0" :: "r"(_bits) :: "volatile"), #[cfg(all(cortex_m, not(feature = "inline-asm")))] () => { |