diff options
author | 2017-05-15 20:50:26 -0500 | |
---|---|---|
committer | 2017-05-15 20:50:26 -0500 | |
commit | 2b256bf82b09be437b1053739c36a87d6b4662db (patch) | |
tree | 81b40dd77aeea4d0193242352ba8e50ecf3f58e7 /src | |
parent | 6b5c4cf602215fec400e4c9136feb3e271877b22 (diff) | |
download | cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.tar.gz cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.tar.zst cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.zip |
derive Clone, Copy and Debug for more structs / enums
Diffstat (limited to 'src')
-rw-r--r-- | src/exception.rs | 1 | ||||
-rw-r--r-- | src/peripheral/mod.rs | 3 | ||||
-rw-r--r-- | src/register/apsr.rs | 1 | ||||
-rw-r--r-- | src/register/control.rs | 7 | ||||
-rw-r--r-- | src/register/faultmask.rs | 2 | ||||
-rw-r--r-- | src/register/primask.rs | 2 |
6 files changed, 11 insertions, 5 deletions
diff --git a/src/exception.rs b/src/exception.rs index f5b52f6..61b7415 100644 --- a/src/exception.rs +++ b/src/exception.rs @@ -190,6 +190,7 @@ where } /// Registers stacked during an exception +#[derive(Clone, Copy, Debug)] #[repr(C)] pub struct StackedRegisters { /// (General purpose) Register 0 diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs index 70653af..67ed026 100644 --- a/src/peripheral/mod.rs +++ b/src/peripheral/mod.rs @@ -51,6 +51,7 @@ pub const TPIU: Peripheral<Tpiu> = unsafe { Peripheral::new(0xE004_0000) }; // TODO stand-alone registers: ICTR, ACTLR and STIR /// A peripheral +#[derive(Debug)] pub struct Peripheral<T> where T: 'static, @@ -425,6 +426,7 @@ pub struct Scb { } /// FPU access mode +#[derive(Clone, Copy, Debug)] pub enum FpuAccessMode { /// FPU is not accessible Disabled, @@ -489,6 +491,7 @@ pub struct Syst { } /// SysTick clock source +#[derive(Clone, Copy, Debug)] pub enum SystClkSource { /// Core-provided clock Core, diff --git a/src/register/apsr.rs b/src/register/apsr.rs index 338c684..d966de0 100644 --- a/src/register/apsr.rs +++ b/src/register/apsr.rs @@ -1,6 +1,7 @@ //! Application Program Status Register /// Application Program Status Register +#[derive(Clone, Copy, Debug)] pub struct Apsr { bits: u32, } diff --git a/src/register/control.rs b/src/register/control.rs index 62ebff6..d5cb8ec 100644 --- a/src/register/control.rs +++ b/src/register/control.rs @@ -1,6 +1,7 @@ //! Control register /// Control register +#[derive(Clone, Copy, Debug)] pub struct Control { bits: u32, } @@ -40,7 +41,7 @@ impl Control { } /// Thread mode privilege level -#[derive(Clone, Copy, Eq, PartialEq)] +#[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Npriv { /// Privileged Privileged, @@ -61,7 +62,7 @@ impl Npriv { } /// Currently active stack pointer -#[derive(Clone, Copy, Eq, PartialEq)] +#[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Spsel { /// MSP is the current stack pointer Msp, @@ -82,7 +83,7 @@ impl Spsel { } /// Whether context floating-point is currently active -#[derive(Clone, Copy, Eq, PartialEq)] +#[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Fpca { /// Floating-point context active. Active, diff --git a/src/register/faultmask.rs b/src/register/faultmask.rs index 5a06b37..7a0d06c 100644 --- a/src/register/faultmask.rs +++ b/src/register/faultmask.rs @@ -1,7 +1,7 @@ //! Fault Mask Register /// All exceptions are ... -#[derive(Clone, Copy, Eq, PartialEq)] +#[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Faultmask { /// Active Active, diff --git a/src/register/primask.rs b/src/register/primask.rs index 1e24b73..313693f 100644 --- a/src/register/primask.rs +++ b/src/register/primask.rs @@ -1,7 +1,7 @@ //! Priority mask register /// All exceptions with configurable priority are ... -#[derive(Clone, Copy, Eq, PartialEq)] +#[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Primask { /// Active Active, |