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authorGravatar Dániel Buga <daniel@revolutionrobotics.org> 2020-05-28 00:16:10 +0200
committerGravatar Dániel Buga <daniel@revolutionrobotics.org> 2020-05-28 00:16:10 +0200
commit53b79bd8bbf449262520f78e4a575af10bebdc69 (patch)
tree5096f230d51fc55e62eaf8f726dd98ed8b3fc2b9 /src
parentbc0db25e6a9308bb4340dcce7f5d53151b0b728d (diff)
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Where did those ifs come from...
Diffstat (limited to 'src')
-rw-r--r--src/register/fpscr.rs18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/register/fpscr.rs b/src/register/fpscr.rs
index 4017956..d7ceea2 100644
--- a/src/register/fpscr.rs
+++ b/src/register/fpscr.rs
@@ -50,19 +50,19 @@ impl Fpscr {
/// Read the Alternative Half Precision bit
#[inline]
pub fn ahp(self) -> bool {
- if self.bits & (1 << 26) != 0
+ self.bits & (1 << 26) != 0
}
/// Read the Default NaN mode bit
#[inline]
pub fn dn(self) -> bool {
- if self.bits & (1 << 25) != 0
+ self.bits & (1 << 25) != 0
}
/// Read the Flush to Zero mode bit
#[inline]
pub fn fz(self) -> bool {
- if self.bits & (1 << 24) != 0
+ self.bits & (1 << 24) != 0
}
/// Read the Rounding Mode control field
@@ -79,37 +79,37 @@ impl Fpscr {
/// Read the Input Denormal cumulative exception bit
#[inline]
pub fn idc(self) -> bool {
- if self.bits & (1 << 7) != 0
+ self.bits & (1 << 7) != 0
}
/// Read the Inexact cumulative exception bit
#[inline]
pub fn ixc(self) -> bool {
- if self.bits & (1 << 4) != 0
+ self.bits & (1 << 4) != 0
}
/// Read the Underflow cumulative exception bit
#[inline]
pub fn ufc(self) -> bool {
- if self.bits & (1 << 3) != 0
+ self.bits & (1 << 3) != 0
}
/// Read the Overflow cumulative exception bit
#[inline]
pub fn ofc(self) -> bool {
- if self.bits & (1 << 2) != 0
+ self.bits & (1 << 2) != 0
}
/// Read the Division by Zero cumulative exception bit
#[inline]
pub fn dzc(self) -> bool {
- if self.bits & (1 << 1) != 0
+ self.bits & (1 << 1) != 0
}
/// Read the Invalid Operation cumulative exception bit
#[inline]
pub fn ioc(self) -> bool {
- if self.bits & (1 << 0) != 0
+ self.bits & (1 << 0) != 0
}
}