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| author |  Viktor Sonesten <v@tmplt.dev>
| 2021-11-20 00:05:42 +0100 |
|---|---|---|
| committer | Viktor Sonesten <v@tmplt.dev>
| 2021-11-20 00:05:42 +0100 |
| commit | 74e9bbe6811deb4888bf0c20157506ab06e4f957 (patch) | |
| tree | f8f3c093ada6b19ddca60c009b9a3ac80cea6100 /src | |
| parent | 6b013138b734b9bbeb24a345f75d2bcc1c69fa8d (diff) | |
| download | cortex-m-74e9bbe6811deb4888bf0c20157506ab06e4f957.tar.gz cortex-m-74e9bbe6811deb4888bf0c20157506ab06e4f957.tar.zst cortex-m-74e9bbe6811deb4888bf0c20157506ab06e4f957.zip | |
scb: derive serde, Hash, PartialOrd for VectActive behind gates
Exposes two new feature gates for VectActive serde::{Serialize,
Deserialize} (via "serde") and Hash, PartialOrd (via "std-map") for use
on host-side ITM tracing programs. While the struct itself is not
received directly over ITM, its use greatly simplifies the
implementation by allowing VectActive as keys in map collections and
file/socket {,de}serialization to forward the structure elsewhere. These
features are not enabled by default.
Before this patch, serde functionality could be realized via [0], but
this does not propagate down a dependency chain (i.e. if realized for
crate B, which crate A depends on, serde functionality is not exposed in
crate A unless VectActive is wrapped in a type from crate B). I am not
aware of any method to realize PartialOrd, Hash derivation for a
downstream crate.
[0] https://serde.rs/remote-derive.html
Diffstat (limited to 'src')
| -rw-r--r-- | src/peripheral/scb.rs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 688c431..28cfca8 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -11,6 +11,8 @@ use super::CBP; #[cfg(not(armv6m))] use super::CPUID; use super::SCB; +#[cfg(feature = "serde")] +use serde::{Deserialize, Serialize}; /// Register block #[repr(C)] @@ -194,6 +196,8 @@ impl SCB { /// Processor core exceptions (internal interrupts) #[derive(Clone, Copy, Debug, Eq, PartialEq)] +#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] +#[cfg_attr(feature = "std-map", derive(PartialOrd, Hash))] pub enum Exception { /// Non maskable interrupt NonMaskableInt, @@ -259,6 +263,8 @@ impl Exception { /// Active exception number #[derive(Clone, Copy, Debug, Eq, PartialEq)] +#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] +#[cfg_attr(feature = "std-map", derive(PartialOrd, Hash))] pub enum VectActive { /// Thread mode ThreadMode, |