Add missing inline(always) and change more initialised->initialized

2 files changed, 9 insertions, 8 deletions

diff --git a/src/peripheral/cpuid.rs b/src/peripheral/cpuid.rs
index 3cb0079..32d0baf 100644
--- a/src/peripheral/cpuid.rs
+++ b/src/peripheral/cpuid.rs
@@ -131,6 +131,7 @@ impl CPUID {
     /// caches that are controlled by the processor.
     ///
     /// This is the `IminLine` field of the CTR register.
+    #[inline(always)]
     pub fn cache_iminline() -> u32 {
         const CTR_IMINLINE_POS: u32 = 0;
         const CTR_IMINLINE_MASK: u32 = 0xF << CTR_IMINLINE_POS;
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index 4ab1e8f..eb7bb72 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -531,9 +531,9 @@ impl SCB {
     ///
     /// After invalidating, the next read of invalidated data will be from main memory. This may
     /// cause recent writes to be lost, potentially including writes that initialized objects.
-    /// Therefore, this method may cause uninitialised memory or invalid values to be read,
+    /// Therefore, this method may cause uninitialized memory or invalid values to be read,
     /// resulting in undefined behaviour. You must ensure that main memory contains valid and
-    /// initialised values before invalidating.
+    /// initialized values before invalidating.
     ///
     /// `addr` **must** be aligned to the size of the cache lines, and `size` **must** be a
     /// multiple of the cache line size, otherwise this function will invalidate other memory,
@@ -598,10 +598,10 @@ impl SCB {
     /// # Safety
     ///
     /// After invalidating, `obj` will be read from main memory on next access. This may cause
-    /// recent writes to `obj` to be lost, potentially including the write that initialised it.
-    /// Therefore, this method may cause uninitialised memory or invalid values to be read,
+    /// recent writes to `obj` to be lost, potentially including the write that initialized it.
+    /// Therefore, this method may cause uninitialized memory or invalid values to be read,
     /// resulting in undefined behaviour. You must ensure that main memory contains a valid and
-    /// initialised value for T before invalidating `obj`.
+    /// initialized value for T before invalidating `obj`.
     ///
     /// `obj` **must** be aligned to the size of the cache lines, and its size **must** be a
     /// multiple of the cache line size, otherwise this function will invalidate other memory,
@@ -636,10 +636,10 @@ impl SCB {
     /// # Safety
     ///
     /// After invalidating, `slice` will be read from main memory on next access. This may cause
-    /// recent writes to `slice` to be lost, potentially including the write that initialised it.
-    /// Therefore, this method may cause uninitialised memory or invalid values to be read,
+    /// recent writes to `slice` to be lost, potentially including the write that initialized it.
+    /// Therefore, this method may cause uninitialized memory or invalid values to be read,
     /// resulting in undefined behaviour. You must ensure that main memory contains valid and
-    /// initialised values for T before invalidating `slice`.
+    /// initialized values for T before invalidating `slice`.
     ///
     /// `slice` **must** be aligned to the size of the cache lines, and its size **must** be a
     /// multiple of the cache line size, otherwise this function will invalidate other memory,