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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2019-10-16 15:15:30 +0000
committerGravatar GitHub <noreply@github.com> 2019-10-16 15:15:30 +0000
commitb784ecf7ef9e22e0259eb40a75e30655db53f5be (patch)
tree5d0154dcf09cc4ea6ba023a53f0debe5a9d45d86 /src
parent718cd17aadda36edf3dff761e55a580e54e355df (diff)
parenta7e62b607f8a3c12736926a8136cc58da9069634 (diff)
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Merge #173
173: add a safe method to software unlock the DWT r=therealprof a=japaric today the alternative is an unsafe write to the LAR register Co-authored-by: Jorge Aparicio <jorge@japaric.io>
Diffstat (limited to 'src')
-rw-r--r--src/peripheral/dwt.rs9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/peripheral/dwt.rs b/src/peripheral/dwt.rs
index 5fc59f3..1f7655a 100644
--- a/src/peripheral/dwt.rs
+++ b/src/peripheral/dwt.rs
@@ -75,4 +75,13 @@ impl DWT {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*Self::ptr()).cyccnt.read() }
}
+
+ /// Removes the software lock on the DWT
+ ///
+ /// Some devices, like the STM32F7, software lock the DWT after a power cycle.
+ #[cfg(not(armv6m))]
+ pub fn unlock() {
+ // NOTE(unsafe) atomic write to a stateless, write-only register
+ unsafe { (*Self::ptr()).lar.write(0xC5ACCE55) }
+ }
}