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| author |  Adam Greig <adam@adamgreig.com>
| 2017-06-12 12:38:21 +0100 |
|---|---|---|
| committer | Adam Greig <adam@adamgreig.com>
| 2017-06-12 12:38:21 +0100 |
| commit | c442c1cb2bfdef634d24a6b00cd4d559f2dfb7fa (patch) | |
| tree | 045d35a19826622f05acbd5b4ff23a0d3dee032d /src | |
| parent | 861c0896001ffbb5bbe57cd69177df183ca9819c (diff) | |
| download | cortex-m-c442c1cb2bfdef634d24a6b00cd4d559f2dfb7fa.tar.gz cortex-m-c442c1cb2bfdef634d24a6b00cd4d559f2dfb7fa.tar.zst cortex-m-c442c1cb2bfdef634d24a6b00cd4d559f2dfb7fa.zip | |
Comment out armv7em cfg flag until it's needed
Diffstat (limited to 'src')
| -rw-r--r-- | src/peripheral/mod.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs index 65a82a7..2dcfa30 100644 --- a/src/peripheral/mod.rs +++ b/src/peripheral/mod.rs @@ -934,7 +934,7 @@ pub struct Tpiu { pub struct Cbp { /// I-cache invalidate all to PoU pub iciallu: WO<u32>, - reserved0: RW<u32>, + reserved0: u32, /// I-cache invalidate by MVA to PoU pub icimvau: WO<u32>, /// D-cache invalidate by MVA to PoC |