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| author |  Adam Greig <adam@adamgreig.com>
| 2017-06-12 11:49:38 +0100 |
|---|---|---|
| committer | Adam Greig <adam@adamgreig.com>
| 2017-06-12 11:49:38 +0100 |
| commit | cf3379f792e0ec6ab301e55f83dcf0588b41759a (patch) | |
| tree | 51ca9d58c5f45fdd5295390801d2ad88abe23337 /src | |
| parent | 97911d9650308ff0a93893898620360327de4a13 (diff) | |
| parent | 39515828cae8a3e83d202d5383053d0efe8cfa10 (diff) | |
| download | cortex-m-cf3379f792e0ec6ab301e55f83dcf0588b41759a.tar.gz cortex-m-cf3379f792e0ec6ab301e55f83dcf0588b41759a.tar.zst cortex-m-cf3379f792e0ec6ab301e55f83dcf0588b41759a.zip | |
Merge branch 'master' into cache_control
Conflicts:
src/peripheral/mod.rs
Diffstat (limited to 'src')
| -rw-r--r-- | src/peripheral/mod.rs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs index 89f6f77..ac0bf75 100644 --- a/src/peripheral/mod.rs +++ b/src/peripheral/mod.rs @@ -504,9 +504,9 @@ const SCB_CCR_IC_MASK: u32 = (1<<17); #[cfg(armv7m)] const SCB_CCR_DC_MASK: u32 = (1<<16); -const SCB_CPACR_FPU_MASK: u32 = 0x00780000; -const SCB_CPACR_FPU_ENABLE: u32 = 0x00280000; -const SCB_CPACR_FPU_USER: u32 = 0x00500000; +const SCB_CPACR_FPU_MASK: u32 = 0b11_11 << 20; +const SCB_CPACR_FPU_ENABLE: u32 = 0b01_01 << 20; +const SCB_CPACR_FPU_USER: u32 = 0b10_10 << 20; impl Scb { /// Gets FPU access mode |