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author | 2021-08-30 15:12:35 -0700 | |
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committer | 2021-08-30 15:12:35 -0700 | |
commit | f452f5a995c6ad38c299bd3c2b9ce649d09bf1b3 (patch) | |
tree | 8d90b835af1e5ac4ef57651d877a83b09f902d12 /src | |
parent | fafa4b4d204c1f88f17144da7ae228cba450275d (diff) | |
download | cortex-m-f452f5a995c6ad38c299bd3c2b9ce649d09bf1b3.tar.gz cortex-m-f452f5a995c6ad38c299bd3c2b9ce649d09bf1b3.tar.zst cortex-m-f452f5a995c6ad38c299bd3c2b9ce649d09bf1b3.zip |
Replace URL-relative doc links with intra-doc links
Diffstat (limited to 'src')
-rw-r--r-- | src/peripheral/nvic.rs | 2 | ||||
-rw-r--r-- | src/peripheral/scb.rs | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/peripheral/nvic.rs b/src/peripheral/nvic.rs index 4332707..f0c5457 100644 --- a/src/peripheral/nvic.rs +++ b/src/peripheral/nvic.rs @@ -210,7 +210,7 @@ impl NVIC { /// # Unsafety /// /// Changing priority levels can break priority-based critical sections (see - /// [`register::basepri`](../register/basepri/index.html)) and compromise memory safety. + /// [`register::basepri`](crate::register::basepri)) and compromise memory safety. #[inline] pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8) where diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index b619328..a2f309a 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -994,7 +994,7 @@ impl SCB { /// # Unsafety /// /// Changing priority levels can break priority-based critical sections (see - /// [`register::basepri`](../register/basepri/index.html)) and compromise memory safety. + /// [`register::basepri`](crate::register::basepri)) and compromise memory safety. #[inline] pub unsafe fn set_priority(&mut self, system_handler: SystemHandler, prio: u8) { let index = system_handler as u8; |