diff options
| -rw-r--r-- | src/peripheral/dcb.rs | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/peripheral/dcb.rs b/src/peripheral/dcb.rs index 14dc75b..ac84eef 100644 --- a/src/peripheral/dcb.rs +++ b/src/peripheral/dcb.rs @@ -20,7 +20,7 @@ pub struct RegisterBlock { } impl DCB { - /// Enables TRACE. This is for example required by the + /// Enables TRACE. This is for example required by the /// `peripheral::DWT` cycle counter to work properly. /// As by STM documentation, this flag is not reset on /// soft-reset, only on power reset. @@ -28,10 +28,14 @@ impl DCB { // set bit 24 / TRCENA unsafe { self.demcr.modify(|w| w | DCB_DEMCR_TRCENA); } } - + /// Disables TRACE. See `DCB::enable_trace()` for more details pub fn disable_trace(&mut self) { // unset bit 24 / TRCENA unsafe { self.demcr.modify(|w| w & !DCB_DEMCR_TRCENA); } + + /// Is there a debugger attached? + pub fn is_debugger_attached(&self) -> bool { + self.dhcsr.read() & 0x1 == 1 } } |