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-rw-r--r--CHANGELOG.md20
-rw-r--r--Cargo.toml1
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diff --git a/CHANGELOG.md b/CHANGELOG.md
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+# Change Log
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](http://keepachangelog.com/)
+and this project adheres to [Semantic Versioning](http://semver.org/).
+
+## [Unreleased]
+
+## [v0.1.0] - 2016-09-27
+
+### Added
+
+- Functions to access core peripherals like NVIC, SCB and SysTick.
+- Functions to access core registers like CONTROL, MSP and PSR.
+- Functions to enable/disable interrupts
+- Functions to get the vector table
+- Wrappers over miscellaneous instructions like `bkpt`
+
+[Unreleased]: https://github.com/japaric/rustc-cfg/compare/v0.1.0...HEAD
diff --git a/Cargo.toml b/Cargo.toml
index 2bb449a..44ae89e 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,7 @@
[package]
authors = ["Jorge Aparicio <japaricious@gmail.com>"]
description = "Low level access to Cortex-M processors"
+documentation = "https://docs.rs/cortex-m"
keywords = ["arm", "cortex-m", "register", "peripheral"]
license = "MIT OR Apache-2.0"
name = "cortex-m"