diff options
| -rw-r--r-- | asm-v8-main.s | 28 | ||||
| -rwxr-xr-x | assemble.sh | 6 | ||||
| -rw-r--r-- | bin/thumbv8m.main-none-eabi.a | bin | 2810 -> 5220 bytes | |||
| -rw-r--r-- | bin/thumbv8m.main-none-eabihf.a | bin | 0 -> 5220 bytes | |||
| -rw-r--r-- | build.rs | 6 | ||||
| -rw-r--r-- | src/register/mod.rs | 6 | ||||
| -rw-r--r-- | src/register/msplim.rs | 47 | ||||
| -rw-r--r-- | src/register/psplim.rs | 47 |
8 files changed, 138 insertions, 2 deletions
diff --git a/asm-v8-main.s b/asm-v8-main.s new file mode 100644 index 0000000..a59845c --- /dev/null +++ b/asm-v8-main.s @@ -0,0 +1,28 @@ + .section .text.__msplim_r + .global __msplim_r + .thumb_func +__msplim_r: + mrs r0, MSPLIM + bx lr + + .section .text.__msplim_w + .global __msplim_w + .thumb_func +__msplim_w: + msr MSPLIM, r0 + bx lr + + .section .text.__psplim_r + .global __psplim_r + .thumb_func +__psplim_r: + mrs r0, PSPLIM + bx lr + + .section .text.__psplim_w + .global __psplim_w + .thumb_func +__psplim_w: + msr PSPLIM, r0 + bx lr + diff --git a/assemble.sh b/assemble.sh index 28494a9..6a4ccdd 100755 --- a/assemble.sh +++ b/assemble.sh @@ -26,8 +26,12 @@ arm-none-eabi-as -march=armv8-m.base asm.s -o bin/$crate.o ar crs bin/thumbv8m.base-none-eabi.a bin/$crate.o arm-none-eabi-as -march=armv8-m.main asm.s -o bin/$crate.o -ar crs bin/thumbv8m.main-none-eabi.a bin/$crate.o +arm-none-eabi-as -march=armv8-m.main asm-v7.s -o bin/$crate-v7.o +arm-none-eabi-as -march=armv8-m.main asm-v8-main.s -o bin/$crate-v8-main.o +ar crs bin/thumbv8m.main-none-eabi.a bin/$crate.o bin/$crate-v7.o bin/$crate-v8-main.o +ar crs bin/thumbv8m.main-none-eabihf.a bin/$crate.o bin/$crate-v7.o bin/$crate-v8-main.o rm bin/$crate.o rm bin/$crate-v7.o rm bin/$crate-cm7-r0p1.o +rm bin/$crate-v8-main.o diff --git a/bin/thumbv8m.main-none-eabi.a b/bin/thumbv8m.main-none-eabi.a Binary files differindex ddf83c1..a0b35de 100644 --- a/bin/thumbv8m.main-none-eabi.a +++ b/bin/thumbv8m.main-none-eabi.a diff --git a/bin/thumbv8m.main-none-eabihf.a b/bin/thumbv8m.main-none-eabihf.a Binary files differnew file mode 100644 index 0000000..a0b35de --- /dev/null +++ b/bin/thumbv8m.main-none-eabihf.a @@ -26,9 +26,13 @@ fn main() { println!("cargo:rustc-cfg=cortex_m"); println!("cargo:rustc-cfg=armv7m"); //println!("cargo:rustc-cfg=armv7em"); - } else if target.starts_with("thumbv8m") { + } else if target.starts_with("thumbv8m.base") { println!("cargo:rustc-cfg=cortex_m"); println!("cargo:rustc-cfg=armv8m"); + } else if target.starts_with("thumbv8m.main") { + println!("cargo:rustc-cfg=cortex_m"); + println!("cargo:rustc-cfg=armv8m"); + println!("cargo:rustc-cfg=armv8m_main"); } if target.ends_with("-eabihf") { diff --git a/src/register/mod.rs b/src/register/mod.rs index 1444aff..854d725 100644 --- a/src/register/mod.rs +++ b/src/register/mod.rs @@ -43,6 +43,12 @@ pub mod primask; pub mod psp; +#[cfg(armv8m_main)] +pub mod msplim; + +#[cfg(armv8m_main)] +pub mod psplim; + // Accessing these registers requires inline assembly because their contents are tied to the current // stack frame #[cfg(any(feature = "inline-asm", target_arch = "x86_64"))] diff --git a/src/register/msplim.rs b/src/register/msplim.rs new file mode 100644 index 0000000..df3642a --- /dev/null +++ b/src/register/msplim.rs @@ -0,0 +1,47 @@ +//! Main Stack Pointer Limit Register + +/// Reads the CPU register +#[inline] +pub fn read() -> u32 { + match () { + #[cfg(all(cortex_m, feature = "inline-asm"))] + () => { + let r; + unsafe { asm!("mrs $0,MSPLIM" : "=r"(r) ::: "volatile") } + r + } + + #[cfg(all(cortex_m, not(feature = "inline-asm")))] + () => unsafe { + extern "C" { + fn __msplim_r() -> u32; + } + + __msplim_r() + }, + + #[cfg(not(cortex_m))] + () => unimplemented!(), + } +} + +/// Writes `bits` to the CPU register +#[inline] +pub unsafe fn write(_bits: u32) { + match () { + #[cfg(all(cortex_m, feature = "inline-asm"))] + () => asm!("msr MSPLIM,$0" :: "r"(_bits) :: "volatile"), + + #[cfg(all(cortex_m, not(feature = "inline-asm")))] + () => { + extern "C" { + fn __msplim_w(_: u32); + } + + __msplim_w(_bits); + } + + #[cfg(not(cortex_m))] + () => unimplemented!(), + } +} diff --git a/src/register/psplim.rs b/src/register/psplim.rs new file mode 100644 index 0000000..6c27008 --- /dev/null +++ b/src/register/psplim.rs @@ -0,0 +1,47 @@ +//! Process Stack Pointer Limit Register + +/// Reads the CPU register +#[inline] +pub fn read() -> u32 { + match () { + #[cfg(all(cortex_m, feature = "inline-asm"))] + () => { + let r; + unsafe { asm!("mrs $0,PSPLIM" : "=r"(r) ::: "volatile") } + r + } + + #[cfg(all(cortex_m, not(feature = "inline-asm")))] + () => unsafe { + extern "C" { + fn __psplim_r() -> u32; + } + + __psplim_r() + }, + + #[cfg(not(cortex_m))] + () => unimplemented!(), + } +} + +/// Writes `bits` to the CPU register +#[inline] +pub unsafe fn write(_bits: u32) { + match () { + #[cfg(all(cortex_m, feature = "inline-asm"))] + () => asm!("msr PSPLIM,$0" :: "r"(_bits) :: "volatile"), + + #[cfg(all(cortex_m, not(feature = "inline-asm")))] + () => { + extern "C" { + fn __psplim_w(_: u32); + } + + __psplim_w(_bits); + } + + #[cfg(not(cortex_m))] + () => unimplemented!(), + } +} |