diff options
-rw-r--r-- | src/peripheral/scb.rs | 2 | ||||
-rw-r--r-- | src/peripheral/test.rs | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 4bf9270..c82e098 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -48,7 +48,7 @@ pub struct RegisterBlock { pub shpr: [RW<u32>; 2], /// System Handler Control and State - pub shcrs: RW<u32>, + pub shcsr: RW<u32>, /// Configurable Fault Status (not present on Cortex-M0 variants) #[cfg(not(armv6m))] diff --git a/src/peripheral/test.rs b/src/peripheral/test.rs index cc3e292..1f75818 100644 --- a/src/peripheral/test.rs +++ b/src/peripheral/test.rs @@ -121,7 +121,7 @@ fn scb() { assert_eq!(address(&scb.scr), 0xE000_ED10); assert_eq!(address(&scb.ccr), 0xE000_ED14); assert_eq!(address(&scb.shpr), 0xE000_ED18); - assert_eq!(address(&scb.shcrs), 0xE000_ED24); + assert_eq!(address(&scb.shcsr), 0xE000_ED24); assert_eq!(address(&scb.cfsr), 0xE000_ED28); assert_eq!(address(&scb.hfsr), 0xE000_ED2C); assert_eq!(address(&scb.dfsr), 0xE000_ED30); |