9 files changed, 0 insertions, 17 deletions

diff --git a/src/cmse.rs b/src/cmse.rs
index 393e463..36d7447 100644
--- a/src/cmse.rs
+++ b/src/cmse.rs
@@ -37,7 +37,6 @@ use bitfield::bitfield;
 
 /// Memory access behaviour: determine which privilege execution mode is used and which Memory
 /// Protection Unit (MPU) is used.
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(PartialEq, Copy, Clone, Debug)]
 pub enum AccessType {
     /// Access using current privilege level and reading from current security state MPU.
@@ -55,7 +54,6 @@ pub enum AccessType {
 
 /// Abstraction of TT instructions and helper functions to determine the security and privilege
 /// attribute of a target address, accessed in different ways.
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(PartialEq, Copy, Clone, Debug)]
 pub struct TestTarget {
     tt_resp: TtResp,
diff --git a/src/peripheral/cpuid.rs b/src/peripheral/cpuid.rs
index 32d0baf..ad2b6e6 100644
--- a/src/peripheral/cpuid.rs
+++ b/src/peripheral/cpuid.rs
@@ -66,7 +66,6 @@ pub struct RegisterBlock {
 
 /// Type of cache to select on CSSELR writes.
 #[cfg(not(armv6m))]
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum CsselrCacheType {
     /// Select DCache or unified cache
diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index 1b25b5f..b619328 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -97,7 +97,6 @@ pub struct RegisterBlock {
 
 /// FPU access mode
 #[cfg(has_fpu)]
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum FpuAccessMode {
     /// FPU is not accessible
@@ -194,7 +193,6 @@ impl SCB {
 }
 
 /// Processor core exceptions (internal interrupts)
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Exception {
     /// Non maskable interrupt
@@ -260,7 +258,6 @@ impl Exception {
 }
 
 /// Active exception number
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum VectActive {
     /// Thread mode
@@ -913,7 +910,6 @@ impl SCB {
 }
 
 /// System handlers, exceptions with configurable priority
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 #[repr(u8)]
 pub enum SystemHandler {
diff --git a/src/peripheral/syst.rs b/src/peripheral/syst.rs
index 69bc488..abcd00b 100644
--- a/src/peripheral/syst.rs
+++ b/src/peripheral/syst.rs
@@ -18,7 +18,6 @@ pub struct RegisterBlock {
 }
 
 /// SysTick clock source
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum SystClkSource {
     /// Core-provided clock
diff --git a/src/register/apsr.rs b/src/register/apsr.rs
index b81d892..e83435c 100644
--- a/src/register/apsr.rs
+++ b/src/register/apsr.rs
@@ -1,7 +1,6 @@
 //! Application Program Status Register
 
 /// Application Program Status Register
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug)]
 pub struct Apsr {
     bits: u32,
diff --git a/src/register/control.rs b/src/register/control.rs
index 938b10f..a991625 100644
--- a/src/register/control.rs
+++ b/src/register/control.rs
@@ -1,7 +1,6 @@
 //! Control register
 
 /// Control register
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug)]
 pub struct Control {
     bits: u32,
@@ -82,7 +81,6 @@ impl Control {
 }
 
 /// Thread mode privilege level
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Npriv {
     /// Privileged
@@ -106,7 +104,6 @@ impl Npriv {
 }
 
 /// Currently active stack pointer
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Spsel {
     /// MSP is the current stack pointer
@@ -130,7 +127,6 @@ impl Spsel {
 }
 
 /// Whether context floating-point is currently active
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Fpca {
     /// Floating-point context active.
diff --git a/src/register/faultmask.rs b/src/register/faultmask.rs
index 1f19d97..e57fa28 100644
--- a/src/register/faultmask.rs
+++ b/src/register/faultmask.rs
@@ -1,7 +1,6 @@
 //! Fault Mask Register
 
 /// All exceptions are ...
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Faultmask {
     /// Active
diff --git a/src/register/fpscr.rs b/src/register/fpscr.rs
index dd538e9..68692c7 100644
--- a/src/register/fpscr.rs
+++ b/src/register/fpscr.rs
@@ -1,7 +1,6 @@
 //! Floating-point Status Control Register
 
 /// Floating-point Status Control Register
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug)]
 pub struct Fpscr {
     bits: u32,
@@ -253,7 +252,6 @@ impl Fpscr {
 }
 
 /// Rounding mode
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum RMode {
     /// Round to Nearest (RN) mode. This is the reset value.
diff --git a/src/register/primask.rs b/src/register/primask.rs
index 20692a2..17f7295 100644
--- a/src/register/primask.rs
+++ b/src/register/primask.rs
@@ -1,7 +1,6 @@
 //! Priority mask register
 
 /// All exceptions with configurable priority are ...
-#[allow(clippy::missing_inline_in_public_items)]
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Primask {
     /// Active