11 files changed, 45 insertions, 33 deletions

diff --git a/cortex-m-rt/.cargo/config b/cortex-m-rt/.cargo/config
index 0d6b19c..1662bc6 100644
--- a/cortex-m-rt/.cargo/config
+++ b/cortex-m-rt/.cargo/config
@@ -1,11 +1,14 @@
+[target.thumbv6m-none-eabi]
+runner = "qemu-system-arm -cpu cortex-m0 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
+
 [target.thumbv7m-none-eabi]
-# uncomment this to make `cargo run` execute programs on QEMU
 runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
 
-[target.thumbv6m-none-eabi]
-# uncomment this to make `cargo run` execute programs on QEMU
-# For now, we use cortex-m3 instead of cortex-m0 which are not supported by QEMU
-runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
+[target.thumbv7em-none-eabi]
+runner = "qemu-system-arm -cpu cortex-m4 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
+
+[target.thumbv7em-none-eabihf]
+runner = "qemu-system-arm -cpu cortex-m4 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel"
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
 # uncomment ONE of these three option to make `cargo run` start a GDB session
@@ -28,4 +31,4 @@ rustflags = [
   # "-C", "linker=arm-none-eabi-gcc",
   # "-C", "link-arg=-Wl,-Tlink.x",
   # "-C", "link-arg=-nostartfiles",
-]
\ No newline at end of file
+]
diff --git a/cortex-m-rt/Cargo.toml b/cortex-m-rt/Cargo.toml
index 1a62ab6..fa5e775 100644
--- a/cortex-m-rt/Cargo.toml
+++ b/cortex-m-rt/Cargo.toml
@@ -19,9 +19,11 @@ links = "cortex-m-rt" # Prevent multiple versions of cortex-m-rt being linked
 [dependencies]
 r0 = "1.0"
 cortex-m-rt-macros = { path = "macros", version = "=0.6.11" }
-cortex-m = "0.6"
+# Note: Do not depend on `cortex-m` here. This crate is used for testing `cortex-m`, so we need to
+# avoid pulling in multiple versions of `cortex-m`.
 
 [dev-dependencies]
+cortex-m = "0.6"
 panic-halt = "0.2.0"
 cortex-m-semihosting = "0.3"
 
diff --git a/cortex-m-rt/asm.s b/cortex-m-rt/asm.s
index 50a3fa5..1be4a02 100644
--- a/cortex-m-rt/asm.s
+++ b/cortex-m-rt/asm.s
@@ -17,3 +17,26 @@ HardFaultTrampoline:
 0:
   mrs r0, PSP
   b HardFault
+
+  .section .text.FpuTrampoline, "ax"
+  .global FpuTrampoline
+  # .type and .thumb_func are both required; otherwise its Thumb bit does not
+  # get set and an invalid vector table is generated
+  .type FpuTrampoline,%function
+  .thumb_func
+  # This enables the FPU and jumps to the main function.
+FpuTrampoline:
+  # Address of SCB.CPACR.
+  ldr r0, =0xE000ED88
+  # Enable access to CP10 and CP11 from both privileged and unprivileged mode.
+  ldr r1, =(0b1111 << 20)
+  # RMW.
+  ldr r2, [r0]
+  orr r2, r2, r1
+  str r2, [r0]
+  # Barrier is required on some processors.
+  dsb
+  isb
+  # Hand execution over to `main`.
+  bl main
+  # Note: `main` must not return. `bl` is used only because it has a wider range than `b`.
diff --git a/cortex-m-rt/bin/thumbv6m-none-eabi.a b/cortex-m-rt/bin/thumbv6m-none-eabi.a
index 6a6a547..99f1b1a 100644
--- a/cortex-m-rt/bin/thumbv6m-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv6m-none-eabi.a
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabi.a b/cortex-m-rt/bin/thumbv7em-none-eabi.a
index 51d9aef..020b796 100644
--- a/cortex-m-rt/bin/thumbv7em-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv7em-none-eabi.a
diff --git a/cortex-m-rt/bin/thumbv7em-none-eabihf.a b/cortex-m-rt/bin/thumbv7em-none-eabihf.a
index 51d9aef..020b796 100644
--- a/cortex-m-rt/bin/thumbv7em-none-eabihf.a
+++ b/cortex-m-rt/bin/thumbv7em-none-eabihf.a
diff --git a/cortex-m-rt/bin/thumbv7m-none-eabi.a b/cortex-m-rt/bin/thumbv7m-none-eabi.a
index dc37fbf..16ade10 100644
--- a/cortex-m-rt/bin/thumbv7m-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv7m-none-eabi.a
diff --git a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a b/cortex-m-rt/bin/thumbv8m.base-none-eabi.a
index dda8dcc..264b029 100644
--- a/cortex-m-rt/bin/thumbv8m.base-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv8m.base-none-eabi.a
diff --git a/cortex-m-rt/bin/thumbv8m.main-none-eabi.a b/cortex-m-rt/bin/thumbv8m.main-none-eabi.a
index ab500f4..01b343f 100644
--- a/cortex-m-rt/bin/thumbv8m.main-none-eabi.a
+++ b/cortex-m-rt/bin/thumbv8m.main-none-eabi.a
diff --git a/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a b/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a
index ab500f4..01b343f 100644
--- a/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a
+++ b/cortex-m-rt/bin/thumbv8m.main-none-eabihf.a
diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs
index 524b161..e2dd667 100644
--- a/cortex-m-rt/src/lib.rs
+++ b/cortex-m-rt/src/lib.rs
@@ -937,9 +937,6 @@ pub unsafe extern "C" fn Reset() -> ! {
         static mut __sdata: u32;
         static mut __edata: u32;
         static __sidata: u32;
-
-        // This symbol will be provided by the user via `#[entry]`
-        fn main() -> !;
     }
 
     extern "Rust" {
@@ -956,33 +953,20 @@ pub unsafe extern "C" fn Reset() -> ! {
     #[allow(clippy::match_single_binding)]
     match () {
         #[cfg(not(has_fpu))]
-        () => main(),
+        () => {
+            extern "C" {
+                // This symbol will be provided by the user via `#[entry]`
+                fn main() -> !;
+            }
+            main()
+        }
         #[cfg(has_fpu)]
         () => {
-            const SCB_CPACR: *mut u32 = 0xE000_ED88 as *mut u32;
-            const SCB_CPACR_FPU_ENABLE: u32 = 0b01_01 << 20;
-            const SCB_CPACR_FPU_USER: u32 = 0b10_10 << 20;
-
-            // enable the FPU
-            core::ptr::write_volatile(
-                SCB_CPACR,
-                *SCB_CPACR | SCB_CPACR_FPU_ENABLE | SCB_CPACR_FPU_USER,
-            );
-
-            cortex_m::asm::dsb();
-            cortex_m::asm::isb();
-
-            // this is used to prevent the compiler from inlining the user `main` into the reset
-            // handler. Inlining can cause the FPU instructions in the user `main` to be executed
-            // before enabling the FPU, and that would produce a hard to diagnose hard fault at
-            // runtime.
-            #[inline(never)]
-            #[export_name = "ResetTrampoline"]
-            fn trampoline() -> ! {
-                unsafe { main() }
+            extern "C" {
+                fn FpuTrampoline() -> !;
             }
 
-            trampoline()
+            FpuTrampoline()
         }
     }
 }