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-rw-r--r--cortex-m-semihosting/src/lib.rs6
1 files changed, 2 insertions, 4 deletions
diff --git a/cortex-m-semihosting/src/lib.rs b/cortex-m-semihosting/src/lib.rs
index a67b84d..721ac45 100644
--- a/cortex-m-semihosting/src/lib.rs
+++ b/cortex-m-semihosting/src/lib.rs
@@ -153,8 +153,7 @@
//!
//! ## `inline-asm`
//!
-//! When this feature is enabled semihosting is implemented using inline assembly (`llvm_asm!`) and
-//! compiling this crate requires nightly.
+//! When this feature is enabled semihosting is implemented using inline assembly (`asm!`).
//!
//! When this feature is disabled semihosting is implemented using FFI calls into an external
//! assembly file and compiling this crate works on stable and beta.
@@ -179,7 +178,6 @@
//!
//! [pdf]: http://infocenter.arm.com/help/topic/com.arm.doc.dui0471e/DUI0471E_developing_for_arm_processors.pdf
-#![cfg_attr(feature = "inline-asm", feature(llvm_asm))]
#![deny(missing_docs)]
#![no_std]
@@ -213,7 +211,7 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
#[cfg(all(thumb, feature = "inline-asm", not(feature = "no-semihosting")))]
() => {
let mut nr = _nr;
- llvm_asm!("bkpt 0xAB" : "+{r0}"(nr) : "{r1}"(_arg) :: "volatile");
+ core::arch::asm!("bkpt #0xab", inout("r0") nr, in("r1") _arg, options(nostack, preserves_flags));
nr
}