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-rw-r--r--src/peripheral/mod.rs6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index 5be5760..4884223 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -623,9 +623,13 @@ impl Scb {
}
/// Invalidates D-cache
+ ///
+ /// Note that calling this while the dcache is enabled will probably wipe out your
+ /// stack, depending on optimisations, breaking returning to the call point.
+ /// It's used immediately before enabling the dcache, but not exported publicly.
#[cfg(armv7m)]
#[inline]
- pub fn invalidate_dcache(&self, cpuid: &Cpuid) {
+ fn invalidate_dcache(&self, cpuid: &Cpuid) {
// All of CBP is write-only so no data races are possible
let cbp = unsafe { &mut *CBP.get() };