src/lib.rs


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

//! Low level access to Cortex-M processors
//!
//! This crate provides:
//!
//! - Access to core peripherals like NVIC, SCB and SysTick.
//! - Access to core registers like CONTROL, MSP and PSR.
//! - Interrupt manipulation mechanisms
//! - Safe wrappers around assembly instructions like `bkpt`

#![deny(missing_docs)]
#![deny(warnings)]
#![cfg_attr(feature = "inline-asm", feature(asm))]
#![no_std]

extern crate aligned;
extern crate bare_metal;
extern crate volatile_register;

#[macro_use]
mod macros;

pub mod asm;
pub mod exception;
pub mod interrupt;
// NOTE(target_arch) is for documentation purposes
#[cfg(any(armv7m, target_arch = "x86_64"))]
pub mod itm;
pub mod peripheral;
pub mod register;

pub use peripheral::Peripherals;

#[cfg(feature = "singleton")]
#[doc(hidden)]
pub use untagged_option::UntaggedOption;