Merge branch 'master'

of https://github.com/rtic-rs/cortex-m-rtic

1 files changed, 5 insertions, 3 deletions

diff --git a/examples/schedule.rs b/examples/schedule.rs
index 70a7a5e3..7e6adc1a 100644
--- a/examples/schedule.rs
+++ b/examples/schedule.rs
@@ -12,9 +12,9 @@ use rtic::cyccnt::{Instant, U32Ext as _};
 
 // NOTE: does NOT work on QEMU!
 #[rtic::app(device = lm3s6965, monotonic = rtic::cyccnt::CYCCNT)]
-const APP: () = {
+mod app {
     #[init(schedule = [foo, bar])]
-    fn init(mut cx: init::Context) {
+    fn init(mut cx: init::Context) -> init::LateResources {
         // Initialize (enable) the monotonic timer (CYCCNT)
         cx.core.DCB.enable_trace();
         // required on Cortex-M7 devices that software lock the DWT (e.g. STM32F7)
@@ -32,6 +32,8 @@ const APP: () = {
 
         // Schedule `bar` to run 4e6 cycles in the future
         cx.schedule.bar(now + 4_000_000.cycles()).unwrap();
+
+        init::LateResources {}
     }
 
     #[task]
@@ -50,4 +52,4 @@ const APP: () = {
     extern "C" {
         fn SSI0();
     }
-};
+}