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author | 2020-12-03 21:04:06 +0100 | |
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committer | 2020-12-03 21:04:06 +0100 | |
commit | ef50aeb2e8245b69843280fabb62589c0716ffdd (patch) | |
tree | a159de70654135eb87c52629c6026766eac3bff0 /src/lib.rs | |
parent | 3b4c10e790e63ac328a7bdb98451ac11d5935731 (diff) | |
download | rtic-ef50aeb2e8245b69843280fabb62589c0716ffdd.tar.gz rtic-ef50aeb2e8245b69843280fabb62589c0716ffdd.tar.zst rtic-ef50aeb2e8245b69843280fabb62589c0716ffdd.zip |
Save, init generation fixed
Diffstat (limited to 'src/lib.rs')
-rw-r--r-- | src/lib.rs | 68 |
1 files changed, 3 insertions, 65 deletions
@@ -32,82 +32,20 @@ #![deny(missing_docs)] #![deny(rust_2018_compatibility)] #![deny(rust_2018_idioms)] -#![deny(warnings)] +// #![deny(warnings)] #![no_std] use core::ops::Sub; -use cortex_m::{ - interrupt::Nr, - peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, TPIU}, -}; +use cortex_m::{interrupt::Nr, peripheral::NVIC}; pub use cortex_m_rtic_macros::app; -pub use rtic_core::{prelude as mutex_prelude, Exclusive, Mutex}; +pub use rtic_core::{prelude as mutex_prelude, Exclusive, monotonic::Monotonic, Mutex}; -#[cfg(armv7m)] -pub mod cyccnt; #[doc(hidden)] pub mod export; #[doc(hidden)] mod tq; -/// `cortex_m::Peripherals` minus `SYST` -#[allow(non_snake_case)] -pub struct Peripherals { - /// Cache and branch predictor maintenance operations (not present on Cortex-M0 variants) - pub CBP: CBP, - - /// CPUID - pub CPUID: CPUID, - - /// Debug Control Block - pub DCB: DCB, - - /// Data Watchpoint and Trace unit - pub DWT: DWT, - - /// Flash Patch and Breakpoint unit (not present on Cortex-M0 variants) - pub FPB: FPB, - - /// Floating Point Unit (only present on `thumbv7em-none-eabihf`) - pub FPU: FPU, - - /// Instrumentation Trace Macrocell (not present on Cortex-M0 variants) - pub ITM: ITM, - - /// Memory Protection Unit - pub MPU: MPU, - - /// Nested Vector Interrupt Controller - pub NVIC: NVIC, - - /// System Control Block - pub SCB: SCB, - - // SysTick: System Timer - // pub SYST: SYST, - /// Trace Port Interface Unit (not present on Cortex-M0 variants) - pub TPIU: TPIU, -} - -impl From<cortex_m::Peripherals> for Peripherals { - fn from(p: cortex_m::Peripherals) -> Self { - Self { - CBP: p.CBP, - CPUID: p.CPUID, - DCB: p.DCB, - DWT: p.DWT, - FPB: p.FPB, - FPU: p.FPU, - ITM: p.ITM, - MPU: p.MPU, - NVIC: p.NVIC, - SCB: p.SCB, - TPIU: p.TPIU, - } - } -} - /// Sets the given `interrupt` as pending /// /// This is a convenience function around |