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2023-03-01Add rtic-timer (timerqueue + monotonic) and rtic-monotonics (systick-monotonic)Gravatar Emil Fresk 42-4716/+0
2023-03-01Fix so deny(missing_docs) workGravatar Emil Fresk 3-0/+7
2023-03-01executor update for less unsafe and more clearGravatar Per Lindgren 2-11/+8
2023-03-01Async tasks can now take arguments at spawn againGravatar Emil Fresk 10-75/+141
2023-03-01More work on new spawn/executorGravatar Emil Fresk 4-80/+23
2023-03-01Start CI, disable docs buildingGravatar Emil Fresk 4-18/+6
2023-03-01Clippy fixesGravatar Emil Fresk 12-59/+40
2023-03-01Support 0 prio tasksGravatar Emil Fresk 7-58/+98
2023-03-01Fix typosGravatar Emil Fresk 1-1/+1
2023-03-01Fix failing UI testGravatar Emil Fresk 1-8/+10
2023-03-01All codegen is now explicitGravatar Emil Fresk 8-128/+57
2023-03-01Cleanup weird locals in codegenGravatar Emil Fresk 1-28/+11
2023-03-01Main in main codegenGravatar Emil Fresk 5-63/+62
2023-03-01Removed same prio spawnGravatar Emil Fresk 3-37/+0
2023-03-01Lifetime cleanupGravatar Emil Fresk 2-40/+14
2023-03-01Break codegen for 0-prio asyncGravatar Emil Fresk 1-9/+9
2023-03-01Removed Priority, simplified lifetime handlingGravatar Emil Fresk 12-152/+52
2023-03-01First example builds againGravatar Emil Fresk 3-15/+13
2023-03-01Even more cleanupGravatar Emil Fresk 5-53/+7
2023-03-01Fix fencesGravatar Emil Fresk 2-8/+7
2023-03-01Added software task codegen backGravatar Emil Fresk 2-1/+111
2023-03-01Min codegenGravatar Emil Fresk 22-1695/+130
2023-03-01syntax: Remove parse settings structGravatar Emil Fresk 5-68/+16
2023-03-01Add check againGravatar Emil Fresk 2-22/+12
2023-03-01Old xtask test passGravatar Emil Fresk 3-43/+21
2023-03-01RTIC v2: Initial commitGravatar Emil Fresk 42-467/+4141
rtic-syntax is now part of RTIC repository
2023-01-22Handle more cfgs, support cfg on HW/SW tasksGravatar Henrik Tjäder 6-6/+25
2023-01-22Enable at least masking out a MonotonicGravatar Henrik Tjäder 5-10/+40
Simplest case working, but leaves a lot to ask as shown by examples/cfg-monotonic.rs Current `rtic-syntax` is unable to validate and handle the `cfgs[]` which limits the usefulness of this.
2023-01-22Make clippy happyGravatar Henrik Tjäder 2-4/+4
2023-01-22Improve RTIC doc handlingGravatar Henrik Tjäder 8-11/+48
Enable use of ``` #![deny(missing_docs)] ```
2022-12-15Clippy: Fix (clippy::needless_borrow)Gravatar Henrik Tjäder 1-1/+1
2022-12-14Fix CI error caused by `critical-section` 0.2.8Gravatar Emil Fresk 1-0/+1
2022-07-27Merge #652Gravatar bors[bot] 3-9/+26
652: Remove use of basepri register on thumbv8m.base r=AfoHT a=neonquill The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` I wasn't sure if it made more sense to replace the `armv7m` config flag with something related to basepri availability or to get closer to matching the cortex-m use of several architecture specific flags. In the end i chose to make the minimal change possible and just narrowed the existing `thumbv8m` check. Context: [cortex-m:src/register/mod.rs](https://github.com/rust-embedded/cortex-m/blob/4e908625204a1e95dd3fd5bdcd8d66d6bc11c3bc/src/register/mod.rs#L33): ``` #[cfg(all(not(armv6m), not(armv8m_base)))] pub mod basepri; ``` [cortex-m:build.rs](https://github.com/rust-embedded/cortex-m/blob/4e908625204a1e95dd3fd5bdcd8d66d6bc11c3bc/build.rs#L21): ``` } else if target.starts_with("thumbv8m.base") { println!("cargo:rustc-cfg=cortex_m"); println!("cargo:rustc-cfg=armv8m"); println!("cargo:rustc-cfg=armv8m_base"); ``` Co-authored-by: David Watson <david@neonquill.com>
2022-07-27Remove use of basepri register on thumbv8m.baseGravatar David Watson 3-9/+26
The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` This is an attempt to account for the fact that thumbv8m.base (M23) MCUs don't have the BASEPRI register but have more than 32 interrupts. This moves away from the architecture specific config flags and switches to a more functional flag. Make the mask size depend on the max interrupt id Rather than assuming a fixed interrupt count of 32 this code uses an array of u32 bitmasks to calculate the priority mask. The size of this array is calculated at compile time based on the size of the largest interrupt id being used in the target code. For thumbv6m this should be equivalent to the previous version that used a single u32 mask. For thumbv8m.base it will be larger depending on the interrupts used. Don't write 0s to the ISER and ICER registers Writing 0s to these registers is a no-op. Since these masks should be calculated at compile time, this conditional should result in writes being optimized out of the code. Prevent panic on non-arm targets Panicking on unknown targets was breaking things like the doc build on linux. This change should only panic when building on unknown arm targets.
2022-07-27Fix missing formattingGravatar Gabriel Górski 2-4/+2
2022-07-06Allow custom `link_section` attributes for late resourcesGravatar Gabriel Górski 2-3/+17
This commit makes RTIC aware of user-provided `link_section` attributes, letting user override default section mapping.
2022-05-24Fix clash with defmtGravatar Emil Fresk 2-4/+8
2022-05-17More ergonomic error from static asserts messagesGravatar Emil Fresk 1-3/+22
2022-05-10Fixed warning from Rust AnalyzerGravatar Emil Fresk 1-2/+2
2022-04-20Added check for resource usage and to generate an compile error for thumbv6 ↵Gravatar Emil Fresk 1-1/+29
exceptions
2022-04-20Masks take 3Gravatar Emil Fresk 2-17/+30
2022-03-02Added support for SRP based scheduling for armv6mGravatar Per Lindgren 4-3/+65
2022-02-22Clippy with pedantic suggestionsGravatar Henrik Tjäder 12-65/+64
2022-02-18rtic::mutex::prelude::* fixes glob import lintGravatar Henrik Tjäder 3-3/+3
rtic-core Mutex, Exclusive and multi-lock retained in old location to not be backwards breaking
2022-02-09Fix/mute clippy errorsGravatar Henrik Tjäder 3-20/+9
2022-01-28RTIC macro expansion: Try to find target-dirGravatar Henrik Tjäder 1-3/+63
2021-12-25Clippy lintsGravatar Henrik Tjäder 5-7/+7
2021-12-14Idle: Switch to NOP instead of WFIGravatar Henrik Tjäder 2-8/+1
Add example how to get old WFI behaviour
2021-11-25Remove #[deny(warnings)], but deny warnings for CIGravatar Henrik Tjäder 1-2/+1
2021-11-25Docs: add RTIC logoGravatar Henrik Tjäder 1-0/+5
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