Combine Interface: MSR; libcpu: `let (high, low);` to signal intent

3 files changed, 2 insertions, 16 deletions

diff --git a/src/bits64/mod.rs b/src/bits64/mod.rs
index 63ebac2..4b83c7c 100644
--- a/src/bits64/mod.rs
+++ b/src/bits64/mod.rs
@@ -30,7 +30,6 @@ macro_rules! check_bit_fn {
     )
 }
 
-pub mod msr;
 pub mod time;
 pub mod irq;
 pub mod paging;
diff --git a/src/shared/mod.rs b/src/shared/mod.rs
index 167d7d3..6613f54 100644
--- a/src/shared/mod.rs
+++ b/src/shared/mod.rs
@@ -5,6 +5,7 @@ pub mod descriptor;
 pub mod dtables;
 pub mod io;
 pub mod irq;
+pub mod msr;
 pub mod paging;
 pub mod flags;
 pub mod segmentation;
@@ -75,11 +76,6 @@ bitflags!(
     }
 );
 
-#[derive(Copy, Clone, PartialEq, Eq)]
-pub enum Msr {
-    ApicBase = 0x1B
-}
-
 #[inline(always)]
 pub fn cpuid(function: u32) -> (u32, u32, u32, u32) {
     unsafe {
@@ -97,13 +93,6 @@ pub fn supports() -> Features {
     }
 }
 
-#[inline(always)]
-pub unsafe fn read_msr(msr: Msr) -> u64 {
-    let (r1, r2): (u32, u32);
-    asm!("rdmsr" : "={eax}"(r1), "={edx}"(r2) : "{ecx}"(msr as u32) :: "intel");
-    r1 as u64 | ((r2 as u64) << 32)
-}
-
 #[derive(Copy, Clone, PartialEq, Eq)]
 #[repr(u8)]
 pub enum PrivilegeLevel {
diff --git a/src/bits64/msr.rs b/src/shared/msr.rs
index 6b4613a..1520232 100644
--- a/src/bits64/msr.rs
+++ b/src/shared/msr.rs
@@ -10,10 +10,8 @@ pub unsafe fn wrmsr(msr: u32, value: u64) {
 /// Read 64 bits msr register.
 #[allow(unused_mut)]
 pub unsafe fn rdmsr(msr: u32) -> u64 {
-    let mut low: u32;
-    let mut high: u32;
+    let (high, low): (u32, u32);
     asm!("rdmsr" : "={eax}" (low), "={edx}" (high) : "{ecx}" (msr) : "memory" : "volatile");
-
     ((high as u64) << 32) | (low as u64)
 }