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authorGravatar Lucas Kent <rubickent@gmail.com> 2022-03-03 11:59:47 +1100
committerGravatar Gerd Zellweger <mail@gerdzellweger.com> 2022-03-03 10:14:12 +0100
commit869ae330ecfaa3cbd9381c5eee5b6ee8b6090af9 (patch)
tree59e9cfa9426ef0e544d79a0ad6309a63ff1ddcee
parentc43f9abaad6d1cc85d44ae62af833560eb362df8 (diff)
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Remove remaining usages of nightly features
-rw-r--r--src/apic/xapic.rs8
-rw-r--r--src/lib.rs2
2 files changed, 3 insertions, 7 deletions
diff --git a/src/apic/xapic.rs b/src/apic/xapic.rs
index d777478..218e4c5 100644
--- a/src/apic/xapic.rs
+++ b/src/apic/xapic.rs
@@ -3,10 +3,8 @@
//! Table 10-1 Local APIC Register Address Map
//! the MMIO base values are found in this file.
-use core::fmt;
-use core::intrinsics::{volatile_load, volatile_store};
-
use bit_field::BitField;
+use core::fmt;
use super::*;
use crate::msr::{rdmsr, wrmsr, IA32_APIC_BASE, IA32_TSC_DEADLINE};
@@ -306,14 +304,14 @@ impl XAPIC {
fn read(&self, offset: ApicRegister) -> u32 {
assert!(offset as usize % 4 == 0);
let index = offset as usize / 4;
- unsafe { volatile_load(&self.mmio_region[index]) }
+ unsafe { core::ptr::read_volatile(&self.mmio_region[index]) }
}
/// write a register in the MMIO region.
fn write(&mut self, offset: ApicRegister, val: u32) {
assert!(offset as usize % 4 == 0);
let index = offset as usize / 4;
- unsafe { volatile_store(&mut self.mmio_region[index], val) }
+ unsafe { core::ptr::write_volatile(&mut self.mmio_region[index], val) }
}
}
diff --git a/src/lib.rs b/src/lib.rs
index cda543c..b505446 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,6 +1,4 @@
#![cfg(any(target_arch = "x86", target_arch = "x86_64"))]
-#![allow(stable_features)]
-#![feature(core_intrinsics)]
#![no_std]
#![cfg_attr(test, allow(unused_features))]
#![cfg_attr(all(test, feature = "vmtest"), feature(custom_test_frameworks))]