Add support for clac and stac instructions.

3 files changed, 32 insertions, 1 deletions

diff --git a/Cargo.toml b/Cargo.toml
index d70e3c1..b9f4cde 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "x86"
-version = "0.16.3"
+version = "0.17.0"
 authors = [
   "Gerd Zellweger <mail@gerdzellweger.com>",
   "Eric Kidd <git@randomhacks.net>",
diff --git a/src/bits32/eflags.rs b/src/bits32/eflags.rs
index a98b22a..4e073ec 100644
--- a/src/bits32/eflags.rs
+++ b/src/bits32/eflags.rs
@@ -77,3 +77,31 @@ pub unsafe fn read() -> EFlags {
 pub unsafe fn set(val: EFlags) {
     asm!("pushl $0; popfl" :: "r"(val.bits()) : "memory" "flags");
 }
+
+/// Clears the AC flag bit in EFLAGS register.
+///
+/// This disables any alignment checking of user-mode data accesses.
+/// If the SMAP bit is set in the CR4 register, this disallows
+/// explicit supervisor-mode data accesses to user-mode pages.
+///
+/// # Unsafe
+///
+/// This instruction is only valid in Ring 0 and requires
+/// that the CPU supports the instruction (check CPUID).
+pub unsafe fn clac() {
+    asm!("clac" ::: "memory" "flags" : "volatile");
+}
+
+/// Sets the AC flag bit in EFLAGS register.
+///
+/// This may enable alignment checking of user-mode data accesses.
+/// This allows explicit supervisor-mode data accesses to user-mode
+/// pages even if the SMAP bit is set in the CR4 register.
+///
+/// # Unsafe
+///
+/// This instruction is only valid in Ring 0 and requires
+/// that the CPU supports the instruction (check CPUID).
+pub unsafe fn stac() {
+    asm!("stac" ::: "memory" "flags" : "volatile");
+}
\ No newline at end of file
diff --git a/src/bits64/rflags.rs b/src/bits64/rflags.rs
index 4c7deea..5f6fa11 100644
--- a/src/bits64/rflags.rs
+++ b/src/bits64/rflags.rs
@@ -86,3 +86,6 @@ pub unsafe fn read() -> RFlags {
 pub unsafe fn set(val: RFlags) {
     asm!("pushq $0; popfq" :: "r"(val.bits()) : "memory" "flags");
 }
+
+// clac and stac are also usable in 64-bit mode
+pub use crate::bits32::eflags::{clac, stac};