Finish converting to new asm!() syntax.

I got a number of compile failures with `llvm_asm`
with the latest nightly.  Instead of figuring out
how to fix that, I just went ahead and finished
converting everything to use `asm`, which has the
added bonus of being stable, anyway!

I'm not entirely sure this is all correct;
`cargo test` seems to drag in an explicit
dependency on x86-0.44.0, which still fails.

Note also that the SGX modifications are a bit
more elaborate than what had been there; apparently
LLVM uses the %rbx internally, even though the
instructions exposed in that module use that
register.  I worked around that by pushing %rbx
and then copying the leaf operand from %rsi to
%rbx and copying %rbx _back_ to %rsi for output
and popping the original value of %rbx.  The
input/output operands are then writen in terms
of %rsi.

Signed-off-by: Dan Cross <cross@gajendra.net>

1 files changed, 6 insertions, 3 deletions

diff --git a/src/bits32/segmentation.rs b/src/bits32/segmentation.rs
index ff9cc9d..2bbd3bd 100644
--- a/src/bits32/segmentation.rs
+++ b/src/bits32/segmentation.rs
@@ -1,6 +1,9 @@
 #[allow(unused_imports)]
 use crate::segmentation::SegmentSelector;
 
+#[cfg(target_arch = "x86")]
+use core::arch::asm;
+
 /// Reload code segment register.
 /// Note this is special since we can not directly move
 /// to %cs. Instead we push the new segment selector
@@ -8,8 +11,8 @@ use crate::segmentation::SegmentSelector;
 /// to reload cs and continue at 1:.
 #[cfg(target_arch = "x86")]
 pub unsafe fn load_cs(sel: SegmentSelector) {
-    llvm_asm!("pushl $0; \
-          pushl $$1f; \
+    asm!("pushl {0}; \
+          pushl $1f; \
           lretl; \
-          1:" :: "ri" (sel.bits() as u32) : "memory");
+          1:", in(reg) sel.bits() as u32, options(att_syntax));
 }