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author | 2016-12-21 12:02:58 +0100 | |
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committer | 2016-12-21 12:02:58 +0100 | |
commit | 203360a0296158dc21aa723ab41c8b7681149368 (patch) | |
tree | e90ee844e89183a833976fed8d9a3e4c59b125f6 /src/shared/segmentation.rs | |
parent | bb86b201ddc4164beb4a8539fe8d912d37e21a22 (diff) | |
download | rust-x86-203360a0296158dc21aa723ab41c8b7681149368.tar.gz rust-x86-203360a0296158dc21aa723ab41c8b7681149368.tar.zst rust-x86-203360a0296158dc21aa723ab41c8b7681149368.zip |
Fix TableIndicator bit offset
According to the mentioned Intel 3a, Section 3.4.2 "Segment Selectors", the TI bit is bit 2.
Diffstat (limited to 'src/shared/segmentation.rs')
-rw-r--r-- | src/shared/segmentation.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/shared/segmentation.rs b/src/shared/segmentation.rs index d566d28..2fcfa87 100644 --- a/src/shared/segmentation.rs +++ b/src/shared/segmentation.rs @@ -18,9 +18,9 @@ bitflags! { const RPL_3 = 0b11, /// Table Indicator (TI) 0 means GDT is used. - const TI_GDT = 0 << 3, + const TI_GDT = 0 << 2, /// Table Indicator (TI) 1 means LDT is used. - const TI_LDT = 1 << 3, + const TI_LDT = 1 << 2, } } |