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| author |  Gerd Zellweger <mail@gerdzellweger.com>
| 2019-02-07 15:40:06 -0800 |
|---|---|---|
| committer | Gerd Zellweger <mail@gerdzellweger.com>
| 2019-02-07 15:40:34 -0800 |
| commit | 380a17eee6be1ce9e4da2ab52f83e1af47779460 (patch) | |
| tree | f68df9445a669fb20a79a663bf48419700a964dc /src | |
| parent | b8907ecb0ddaa4914deefc8da75751eefeb9de2c (diff) | |
| download | rust-x86-380a17eee6be1ce9e4da2ab52f83e1af47779460.tar.gz rust-x86-380a17eee6be1ce9e4da2ab52f83e1af47779460.tar.zst rust-x86-380a17eee6be1ce9e4da2ab52f83e1af47779460.zip | |
Rename x86-64 to x86_64
Diffstat (limited to 'src')
| -rw-r--r-- | src/bits64/segmentation.rs | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/bits64/segmentation.rs b/src/bits64/segmentation.rs index d297efc..02a0788 100644 --- a/src/bits64/segmentation.rs +++ b/src/bits64/segmentation.rs @@ -129,7 +129,7 @@ impl BuildDescriptor<Descriptor64> for DescriptorBuilder { /// to %cs. Instead we push the new segment selector /// and return value on the stack and use lretq /// to reload cs and continue at 1:. -#[cfg(target_arch = "x86-64")] +#[cfg(target_arch = "x86_64")] pub unsafe fn load_cs(sel: SegmentSelector) { asm!("pushq $0; \ leaq 1f(%rip), %rax; \ @@ -140,21 +140,21 @@ pub unsafe fn load_cs(sel: SegmentSelector) { /// Write GS Segment Base /// Needs FSGSBASE-Enable Bit (bit 16 of CR4) set. -#[cfg(target_arch = "x86-64")] +#[cfg(target_arch = "x86_64")] pub unsafe fn wrgsbase(base: u64) { asm!("wrgsbase $0" :: "r" (base) : "memory"); } /// Write FS Segment Base /// Needs FSGSBASE-Enable Bit (bit 16 of CR4) set. -#[cfg(target_arch = "x86-64")] +#[cfg(target_arch = "x86_64")] pub unsafe fn wrfsbase(base: u64) { asm!("wrfsbase $0" :: "r" (base) : "memory"); } /// Read GS Segment Base /// Needs FSGSBASE-Enable Bit (bit 16 of CR4) set. -#[cfg(target_arch = "x86-64")] +#[cfg(target_arch = "x86_64")] pub unsafe fn rdgsbase() -> u64 { let gs_base: u64; asm!("rdgsbase $0" : "=r" (gs_base) ); @@ -163,7 +163,7 @@ pub unsafe fn rdgsbase() -> u64 { /// Read FS Segment Base /// Needs FSGSBASE-Enable Bit (bit 16 of CR4) set. -#[cfg(target_arch = "x86-64")] +#[cfg(target_arch = "x86_64")] pub unsafe fn rdfsbase() -> u64 { let fs_base: u64; asm!("rdfsbase $0" : "=r" (fs_base) ); |