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| author |  Arpan Srivastava <arpansri98@gmail.com>
| 2021-02-27 12:53:09 +0530 |
|---|---|---|
| committer |  Gerd Zellweger <mail@gerdzellweger.com>
| 2021-02-27 12:54:41 -0800 |
| commit | b29f570dbf5cf3ab3580143204fdcb1d48a109bc (patch) | |
| tree | d5430e64d8b40fb0ae2853452ba8fc175fb133bb /src | |
| parent | 5331eb86927a68099e2fad02ce949b596a547af6 (diff) | |
| download | rust-x86-b29f570dbf5cf3ab3580143204fdcb1d48a109bc.tar.gz rust-x86-b29f570dbf5cf3ab3580143204fdcb1d48a109bc.tar.zst rust-x86-b29f570dbf5cf3ab3580143204fdcb1d48a109bc.zip | |
Update msr.rs to include MSR_IA32_TSX_CTRL
Diffstat (limited to 'src')
| -rw-r--r-- | src/msr.rs | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -213,6 +213,9 @@ pub const MSR_BBL_CR_CTL: u32 = 0x119; pub const MSR_BBL_CR_CTL3: u32 = 0x11e; +/// TSX Ctrl Register for TSX Async Abot (TAA) Migration. See Volume 3A, Section 2.1, Table 2-2. +pub const MSR_IA32_TSX_CTRL: u32 = 0x122; + /// CS register target for CPL 0 code (R/W) See Table 35-2. See Section 5.8.7, Performing Fast Calls to System Procedures with the SYSENTER and SYSEXIT Instructions. pub const IA32_SYSENTER_CS: u32 = 0x174; |