diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/debugregs.rs | 2 | ||||
| -rw-r--r-- | src/irq.rs | 1 | ||||
| -rw-r--r-- | src/lib.rs | 1 | ||||
| -rw-r--r-- | src/task.rs | 1 | ||||
| -rw-r--r-- | src/tlb.rs | 2 |
5 files changed, 7 insertions, 0 deletions
diff --git a/src/debugregs.rs b/src/debugregs.rs index 7255d5b..8319630 100644 --- a/src/debugregs.rs +++ b/src/debugregs.rs @@ -17,6 +17,8 @@ use bit_field::BitField; use bitflags::bitflags; +use core::arch::asm; + /// An array list of all available breakpoint registers. pub const BREAKPOINT_REGS: [Breakpoint; 4] = [ Breakpoint::Dr0, @@ -3,6 +3,7 @@ use bitflags::*; +use core::arch::asm; use core::fmt; /// x86 Exception description (see also Intel Vol. 3a Chapter 6). @@ -6,6 +6,7 @@ #![cfg_attr(all(test, feature = "vmtest"), feature(custom_test_frameworks))] #![cfg_attr(all(test, feature = "vmtest"), test_runner(x86test::runner::runner))] +use core::arch::asm; #[cfg(target_arch = "x86")] pub(crate) use core::arch::x86 as arch; #[cfg(target_arch = "x86_64")] diff --git a/src/task.rs b/src/task.rs index d819e2d..d572c8d 100644 --- a/src/task.rs +++ b/src/task.rs @@ -1,6 +1,7 @@ //! Helpers to program the task state segment. //! See Intel 3a, Chapter 7 +use core::arch::asm; pub use crate::segmentation; /// Returns the current value of the task register. @@ -1,5 +1,7 @@ //! Functions to flush the translation lookaside buffer (TLB). +use core::arch::asm; + /// Invalidate the given address in the TLB using the `invlpg` instruction. /// /// # Safety |