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| author |  Tyler Holmes <tyler@holmesengineering.com>
| 2021-12-31 10:30:19 -0800 |
|---|---|---|
| committer | Tyler Holmes <tyler@holmesengineering.com>
| 2021-12-31 10:30:19 -0800 |
| commit | 8ef3eb9ea314a4edd9971541aa42696e868f8c7d (patch) | |
| tree | 863ac1388948cdba213f1ce889752727611490fc | |
| parent | a2d8f6de9f74592a3fc59793bc845b0426e0aa4b (diff) | |
| download | cortex-m-8ef3eb9ea314a4edd9971541aa42696e868f8c7d.tar.gz cortex-m-8ef3eb9ea314a4edd9971541aa42696e868f8c7d.tar.zst cortex-m-8ef3eb9ea314a4edd9971541aa42696e868f8c7d.zip | |
changelog entry
| -rw-r--r-- | CHANGELOG.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/CHANGELOG.md b/CHANGELOG.md index fdb8be9..7da0459 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,6 +18,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). There is a feature `cm7` to enable access to these. - Added `delay::Delay::with_source`, a constructor that lets you specify the SysTick clock source (#374). +- Added the capability for `DWT` to do cycle count comparison (#367). +- Updated `SCB.ICSR.VECTACTIVE`/`SCB::vect_active()` to be 9 bits instead of 8. + Also fixes `VectActive::from` to take a `u16` and subtract `16` for + `VectActive::Interrupt`s to match `SBC::vect_active()` (#373). ### Deprecated |