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-rw-r--r-- | CHANGELOG.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/CHANGELOG.md b/CHANGELOG.md index fdb8be9..7da0459 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,6 +18,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). There is a feature `cm7` to enable access to these. - Added `delay::Delay::with_source`, a constructor that lets you specify the SysTick clock source (#374). +- Added the capability for `DWT` to do cycle count comparison (#367). +- Updated `SCB.ICSR.VECTACTIVE`/`SCB::vect_active()` to be 9 bits instead of 8. + Also fixes `VectActive::from` to take a `u16` and subtract `16` for + `VectActive::Interrupt`s to match `SBC::vect_active()` (#373). ### Deprecated |