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authorGravatar Jorge Aparicio <japaricious@gmail.com> 2017-03-07 22:56:06 -0500
committerGravatar Jorge Aparicio <japaricious@gmail.com> 2017-03-07 22:58:33 -0500
commitc3a35c1b6cea81aa71e8832bca79ccafa492be02 (patch)
treee868906d20c906d238be96cd5c07b07342f7a111 /src/lib.rs
parent9d3f3f323f3b7543d0b49e773aea2c68e535ec83 (diff)
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revamp for memory safety
Diffstat (limited to 'src/lib.rs')
-rw-r--r--src/lib.rs86
1 files changed, 5 insertions, 81 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 322d20c..59428ba 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,12 +1,12 @@
//! Low level access to Cortex-M processors
//!
-//! This crate provides access to:
+//! This crate provides:
//!
-//! - Core peripherals like NVIC, SCB and SysTick.
-//! - Core registers like CONTROL, MSP and PSR.
+//! - Access to core peripherals like NVIC, SCB and SysTick.
+//! - Access to core registers like CONTROL, MSP and PSR.
//! - Interrupt manipulation mechanisms
//! - Data structures like the vector table
-//! - Miscellaneous assembly instructions like `bkpt`
+//! - Safe wrappers around assembly instructions like `bkpt`
#![cfg_attr(feature = "semihosting", feature(macro_reexport))]
#![cfg_attr(target_arch = "arm", feature(core_intrinsics))]
@@ -26,67 +26,12 @@ mod macros;
#[macro_use]
pub mod asm;
+pub mod ctxt;
pub mod exception;
pub mod interrupt;
pub mod peripheral;
pub mod register;
-/// Stack frame
-#[repr(C)]
-pub struct StackFrame {
- /// (General purpose) Register 0
- pub r0: u32,
- /// (General purpose) Register 1
- pub r1: u32,
- /// (General purpose) Register 2
- pub r2: u32,
- /// (General purpose) Register 3
- pub r3: u32,
- /// (General purpose) Register 12
- pub r12: u32,
- /// Linker Register
- pub lr: u32,
- /// Program Counter
- pub pc: u32,
- /// Program Status Register
- pub xpsr: u32,
-}
-
-/// Vector Table
-///
-/// # References
-///
-/// - ARMv7-M Architecture Reference Manual (issue E.b) - Section B1.5 - ARMv7-M exception model
-#[repr(C)]
-pub struct VectorTable {
- /// Reset value of the Main Stack Pointer (MSP)
- pub sp_main: &'static (),
- /// Reset
- pub reset: extern "C" fn() -> !,
- /// Non Maskable Interrupt
- pub nmi: Option<Handler>,
- /// Hard Fault
- pub hard_fault: Option<Handler>,
- /// Memory Management
- pub mem_manage: Option<Handler>,
- /// Bus Fault
- pub bus_fault: Option<Handler>,
- /// Usage Fault
- pub usage_fault: Option<Handler>,
- reserved0: [u32; 4],
- /// Supervisor Call
- pub svcall: Option<Handler>,
- /// Debug Monitor
- pub debug_monitor: Option<Handler>,
- reserved1: u32,
- /// PendSV
- pub pendsv: Option<Handler>,
- /// SysTick
- pub sys_tick: Option<Handler>,
- /// Interrupts. An IMPLEMENTATION DEFINED number of them.
- pub interrupts: [Option<Handler>; 0],
-}
-
/// A reserved spot in the vector table
#[derive(Clone, Copy)]
#[repr(u32)]
@@ -94,24 +39,3 @@ pub enum Reserved {
/// Reserved
Vector = 0,
}
-
-/// Exception/Interrupt Handler
-pub type Handler = unsafe extern "C" fn();
-
-/// Returns the vector table
-pub fn vector_table() -> &'static VectorTable {
- unsafe { deref(peripheral::scb().vtor.read() as usize) }
-}
-
-#[cfg(test)]
-fn address<T>(r: &T) -> usize {
- r as *const T as usize
-}
-
-unsafe fn deref<T>(a: usize) -> &'static T {
- &*(a as *const T)
-}
-
-unsafe fn deref_mut<T>(a: usize) -> &'static mut T {
- &mut *(a as *mut T)
-}