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| author |  Jorge Aparicio <jorge@japaric.io>
| 2017-05-15 20:50:26 -0500 |
|---|---|---|
| committer | Jorge Aparicio <jorge@japaric.io>
| 2017-05-15 20:50:26 -0500 |
| commit | 2b256bf82b09be437b1053739c36a87d6b4662db (patch) | |
| tree | 81b40dd77aeea4d0193242352ba8e50ecf3f58e7 /src/peripheral/mod.rs | |
| parent | 6b5c4cf602215fec400e4c9136feb3e271877b22 (diff) | |
| download | cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.tar.gz cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.tar.zst cortex-m-2b256bf82b09be437b1053739c36a87d6b4662db.zip | |
derive Clone, Copy and Debug for more structs / enums
Diffstat (limited to 'src/peripheral/mod.rs')
| -rw-r--r-- | src/peripheral/mod.rs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs index 70653af..67ed026 100644 --- a/src/peripheral/mod.rs +++ b/src/peripheral/mod.rs @@ -51,6 +51,7 @@ pub const TPIU: Peripheral<Tpiu> = unsafe { Peripheral::new(0xE004_0000) }; // TODO stand-alone registers: ICTR, ACTLR and STIR /// A peripheral +#[derive(Debug)] pub struct Peripheral<T> where T: 'static, @@ -425,6 +426,7 @@ pub struct Scb { } /// FPU access mode +#[derive(Clone, Copy, Debug)] pub enum FpuAccessMode { /// FPU is not accessible Disabled, @@ -489,6 +491,7 @@ pub struct Syst { } /// SysTick clock source +#[derive(Clone, Copy, Debug)] pub enum SystClkSource { /// Core-provided clock Core, |