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author | 2020-06-11 10:14:09 +0000 | |
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committer | 2020-06-11 10:14:09 +0000 | |
commit | 5e757166a80047fbbb7fe5748d8eefc13d81d57c (patch) | |
tree | 8f01aae192b9ecc6c8ba5671d8202bdf7bc4136a /src/peripheral/scb.rs | |
parent | 1c9d36ebe682d79f35ef2b1f34e611cfbf8ee81e (diff) | |
parent | 9062f34d506049b6b68fd2775ada70f9bec83285 (diff) | |
download | cortex-m-5e757166a80047fbbb7fe5748d8eefc13d81d57c.tar.gz cortex-m-5e757166a80047fbbb7fe5748d8eefc13d81d57c.tar.zst cortex-m-5e757166a80047fbbb7fe5748d8eefc13d81d57c.zip |
Merge #220
220: Implement accessing FPSCR r=adamgreig a=bugadani
On the nRF52, sometimes it is necessary to manipulate the FPSCR register, otherwise the device wakes up immediately from sleep. (At least on this device) the FPSCR is only available through `vmrs` instructions.
I've implemented reading the register, parsing its bits and writing a raw value to the register, but let me know if I should also implement manipulation of the named bits.
I would also like to request some assistance to get this to actually build, it's not clear to me how `.s` files are compiled in this library. I'm also not certain where the actual place for this would be - in the registers, or in the `fpu` module.
Co-authored-by: Dániel Buga <bugadani@gmail.com>
Co-authored-by: Dániel Buga <daniel@revolutionrobotics.org>
Diffstat (limited to 'src/peripheral/scb.rs')
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