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authorGravatar bors[bot] <26634292+bors[bot]@users.noreply.github.com> 2020-10-02 16:44:57 +0000
committerGravatar GitHub <noreply@github.com> 2020-10-02 16:44:57 +0000
commitf77d64a2d1505335e4a170d03a40993bb066fd02 (patch)
tree06c7b191bc4d92137762ba88a8aa072426d36bda /src
parent43b9383cbedc5b0fb0b2df51df0e7af742fb7b61 (diff)
parent7102bd4c048d96f65f79f32c1f0b1c59e1a32a51 (diff)
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Merge #268
268: Add some Armv8-M assembly routines r=jonas-schievink a=hug-dev Adds access to `MSP_NS` and the `BXNS` instruction. Also adds `__dsb` which was missing. Executed `cargo xtask assemble` and pushed everything, I hope that's enough. Co-authored-by: Hugues de Valon <hugues.devalon@arm.com>
Diffstat (limited to 'src')
-rw-r--r--src/asm.rs10
-rw-r--r--src/register/msp.rs18
2 files changed, 28 insertions, 0 deletions
diff --git a/src/asm.rs b/src/asm.rs
index 3165aca..8f23aa9 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -154,3 +154,13 @@ pub fn ttat(addr: *mut u32) -> u32 {
let addr = addr as u32;
call_asm!(__ttat(addr: u32) -> u32)
}
+
+/// Branch and Exchange Non-secure
+///
+/// See section C2.4.26 of Armv8-M Architecture Reference Manual for details.
+/// Undefined if executed in Non-Secure state.
+#[inline]
+#[cfg(armv8m)]
+pub unsafe fn bx_ns(addr: u32) {
+ call_asm!(__bxns(addr: u32));
+}
diff --git a/src/register/msp.rs b/src/register/msp.rs
index 275023d..2e8261e 100644
--- a/src/register/msp.rs
+++ b/src/register/msp.rs
@@ -11,3 +11,21 @@ pub fn read() -> u32 {
pub unsafe fn write(bits: u32) {
call_asm!(__msp_w(bits: u32));
}
+
+/// Reads the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will return zeroes.
+#[cfg(armv8m)]
+#[inline]
+pub fn read_ns() -> u32 {
+ call_asm!(__msp_ns_r() -> u32)
+}
+
+/// Writes `bits` to the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will be ignored.
+#[cfg(armv8m)]
+#[inline]
+pub unsafe fn write_ns(bits: u32) {
+ call_asm!(__msp_ns_w(bits: u32));
+}