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-rw-r--r--src/asm.rs10
-rw-r--r--src/register/msp.rs18
2 files changed, 28 insertions, 0 deletions
diff --git a/src/asm.rs b/src/asm.rs
index 3165aca..8f23aa9 100644
--- a/src/asm.rs
+++ b/src/asm.rs
@@ -154,3 +154,13 @@ pub fn ttat(addr: *mut u32) -> u32 {
let addr = addr as u32;
call_asm!(__ttat(addr: u32) -> u32)
}
+
+/// Branch and Exchange Non-secure
+///
+/// See section C2.4.26 of Armv8-M Architecture Reference Manual for details.
+/// Undefined if executed in Non-Secure state.
+#[inline]
+#[cfg(armv8m)]
+pub unsafe fn bx_ns(addr: u32) {
+ call_asm!(__bxns(addr: u32));
+}
diff --git a/src/register/msp.rs b/src/register/msp.rs
index 275023d..2e8261e 100644
--- a/src/register/msp.rs
+++ b/src/register/msp.rs
@@ -11,3 +11,21 @@ pub fn read() -> u32 {
pub unsafe fn write(bits: u32) {
call_asm!(__msp_w(bits: u32));
}
+
+/// Reads the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will return zeroes.
+#[cfg(armv8m)]
+#[inline]
+pub fn read_ns() -> u32 {
+ call_asm!(__msp_ns_r() -> u32)
+}
+
+/// Writes `bits` to the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will be ignored.
+#[cfg(armv8m)]
+#[inline]
+pub unsafe fn write_ns(bits: u32) {
+ call_asm!(__msp_ns_w(bits: u32));
+}