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| author |  Jorge Aparicio <japaricious@gmail.com>
| 2017-03-04 20:57:48 -0500 |
|---|---|---|
| committer | Jorge Aparicio <japaricious@gmail.com>
| 2017-03-04 20:57:48 -0500 |
| commit | fe0461f356ea25e27ca59d2c59094113bb167604 (patch) | |
| tree | 2cae9f1eac66bed4a4d0ff2865c92fb8318ba3aa /src | |
| parent | 251d1aa11244d5356659ccf969e29b0e7da82c7a (diff) | |
| download | cortex-m-fe0461f356ea25e27ca59d2c59094113bb167604.tar.gz cortex-m-fe0461f356ea25e27ca59d2c59094113bb167604.tar.zst cortex-m-fe0461f356ea25e27ca59d2c59094113bb167604.zip | |
fix cfg: thumbv6m -> armv6m
Diffstat (limited to 'src')
| -rw-r--r-- | src/peripheral/nvic.rs | 4 | ||||
| -rw-r--r-- | src/register/mod.rs | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/peripheral/nvic.rs b/src/peripheral/nvic.rs index 054a74e..26a9524 100644 --- a/src/peripheral/nvic.rs +++ b/src/peripheral/nvic.rs @@ -3,10 +3,10 @@ use interrupt::Nr; use volatile_register::{RO, RW}; -#[cfg(thumbv6m)] +#[cfg(armv6m)] const PRIORITY_BITS: u8 = 2; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] const PRIORITY_BITS: u8 = 4; /// Registers diff --git a/src/register/mod.rs b/src/register/mod.rs index 0ec5720..e3321a6 100644 --- a/src/register/mod.rs +++ b/src/register/mod.rs @@ -27,12 +27,12 @@ //! - Cortex-M* Devices Generic User Guide - Section 2.1.3 Core registers pub mod apsr; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod basepri; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod basepri_max; pub mod control; -#[cfg(not(thumbv6m))] +#[cfg(not(armv6m))] pub mod faultmask; pub mod lr; pub mod msp; |