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path: root/macros/src/codegen/util.rs (follow)
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2023-03-01Add rtic-timer (timerqueue + monotonic) and rtic-monotonics (systick-monotonic)Gravatar Emil Fresk 1-238/+0
2023-03-01Async tasks can now take arguments at spawn againGravatar Emil Fresk 1-3/+51
2023-03-01More work on new spawn/executorGravatar Emil Fresk 1-10/+0
2023-03-01Clippy fixesGravatar Emil Fresk 1-8/+8
2023-03-01Support 0 prio tasksGravatar Emil Fresk 1-0/+4
2023-03-01Removed Priority, simplified lifetime handlingGravatar Emil Fresk 1-4/+3
2023-03-01First example builds againGravatar Emil Fresk 1-1/+1
2023-03-01Min codegenGravatar Emil Fresk 1-110/+1
2023-03-01RTIC v2: Initial commitGravatar Emil Fresk 1-10/+33
rtic-syntax is now part of RTIC repository
2022-07-27Remove use of basepri register on thumbv8m.baseGravatar David Watson 1-0/+5
The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` This is an attempt to account for the fact that thumbv8m.base (M23) MCUs don't have the BASEPRI register but have more than 32 interrupts. This moves away from the architecture specific config flags and switches to a more functional flag. Make the mask size depend on the max interrupt id Rather than assuming a fixed interrupt count of 32 this code uses an array of u32 bitmasks to calculate the priority mask. The size of this array is calculated at compile time based on the size of the largest interrupt id being used in the target code. For thumbv6m this should be equivalent to the previous version that used a single u32 mask. For thumbv8m.base it will be larger depending on the interrupts used. Don't write 0s to the ISER and ICER registers Writing 0s to these registers is a no-op. Since these masks should be calculated at compile time, this conditional should result in writes being optimized out of the code. Prevent panic on non-arm targets Panicking on unknown targets was breaking things like the doc build on linux. This change should only panic when building on unknown arm targets.
2022-04-20Masks take 3Gravatar Emil Fresk 1-1/+6
2022-03-02Added support for SRP based scheduling for armv6mGravatar Per Lindgren 1-0/+1
2022-02-22Clippy with pedantic suggestionsGravatar Henrik Tjäder 1-5/+5
2022-02-09Fix/mute clippy errorsGravatar Henrik Tjäder 1-19/+7
2021-12-25Clippy lintsGravatar Henrik Tjäder 1-3/+3
2021-11-11Better errors on when missing to lock shared resourcesGravatar Emil Fresk 1-0/+7
2021-08-20Use `mark_internal_name` by default for methods in `util` to make usage of ↵Gravatar datdenkikniet 1-51/+30
these functions more straightforward. fq_ident is always internal rq_ident is always internal monotonic_ident is always internal inputs_ident is always internal local_resources_ident is always internal shared_resources_ident is always internal monotonic_instants_ident is always internal tq_ident is always internal timer_queue_marker_ident is always internal static_shared_resource_ident is always internal static_local_resource_ident is always internal declared_static_local_resource_ident is always internal Only names, not idents, are now marked as internal Use same rtic internal everywhere
2021-07-09const genericsGravatar Andrey Zgarbul 1-14/+1
2021-07-08Cleanup from review (needs releases to compile)Gravatar Emil Fresk 1-7/+2
2021-07-07Fixing testsGravatar Emil Fresk 1-2/+26
2021-07-07Full local resource syntax workingGravatar Emil Fresk 1-13/+0
2021-07-06Minimal app now compilesGravatar Emil Fresk 1-4/+12
2021-07-05Started workGravatar Emil Fresk 1-7/+20
2021-05-27Prepare release alpha.4Gravatar Emil Fresk 1-4/+1
2021-05-06Flattened the _ out of itGravatar Emil Fresk 1-0/+29
2021-03-13Added interface for cancel/rescheduleGravatar Emil Fresk 1-0/+5
Use wrapping add for marker No need to store handle to queue Remove unnecessary `SpawnHandle::new` Fix test Updated interface to follow proposal
2021-02-25Documentation generation fixesGravatar Emil Fresk 1-7/+2
Test fixes
2021-02-18Now with new monotonic trait and crateGravatar Emil Fresk 1-0/+10
2020-12-13Now handling SysTick as wellGravatar Emil Fresk 1-1/+10
2020-12-12CleanupGravatar Emil Fresk 1-1/+4
2020-12-12Monotonic codegen now passing compile stageGravatar Emil Fresk 1-18/+2
2020-12-08TQ handlers being generatedGravatar Emil Fresk 1-4/+2
2020-12-03Save, init generation fixedGravatar Emil Fresk 1-0/+8
2020-10-23move dispatchers to app argumentGravatar Per Lindgren 1-1/+1
2020-10-22Merge #396Gravatar bors[bot] 1-1/+9
396: Fix namespaces r=AfoHT a=korken89 Co-authored-by: Emil Fresk <emil.fresk@gmail.com>
2020-10-21Hide lock type better to not collide with user typesGravatar Emil Fresk 1-1/+1
2020-10-21Updated examplesGravatar Emil Fresk 1-0/+8
More work
2020-10-15Implement all clippy suggestionsGravatar Henrik Tjäder 1-8/+13
2020-10-15Merge branch 'master' into spawn_experimentGravatar Emil Fresk 1-1/+1
2020-10-15Detect if the rt flag is defined in the PAC/HALGravatar Emil Fresk 1-1/+1
Better error message Improved error string Update UI tests
2020-10-11Now with spawn/schedule from anywhereGravatar Emil Fresk 1-15/+1
2020-09-01Remove stale code, fix comment stylingGravatar Henrik Tjäder 1-53/+5
2020-09-01Since there only will be one init/idle use .first().unwrap(), matching ↵Gravatar Henrik Tjäder 1-11/+4
rtic-syntax
2020-09-01Cargo fmtGravatar Henrik Tjäder 1-21/+6
2020-09-01Brutally yank out multicoreGravatar Henrik Tjäder 1-55/+47
2020-06-11Rename RTFM to RTICGravatar Henrik Tjäder 1-8/+8
2019-08-20adapt to changes in rtfm-syntaxGravatar Jorge Aparicio 1-3/+3
2019-06-29WIPGravatar Jorge Aparicio 1-0/+39
2019-06-20RFC #207Gravatar Jorge Aparicio 1-0/+12
2019-06-18add homogeneous multi-core supportGravatar Jorge Aparicio 1-1/+22